From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61433C4743D for ; Sat, 5 Jun 2021 12:12:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4144B613B4 for ; Sat, 5 Jun 2021 12:12:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230225AbhFEMOn (ORCPT ); Sat, 5 Jun 2021 08:14:43 -0400 Received: from new2-smtp.messagingengine.com ([66.111.4.224]:40605 "EHLO new2-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229931AbhFEMOl (ORCPT ); Sat, 5 Jun 2021 08:14:41 -0400 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailnew.nyi.internal (Postfix) with ESMTP id 8DE7D580495; Sat, 5 Jun 2021 08:12:53 -0400 (EDT) Received: from imap21 ([10.202.2.71]) by compute3.internal (MEProxy); Sat, 05 Jun 2021 08:12:53 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svenpeter.dev; h=mime-version:message-id:in-reply-to:references:date:from:to :cc:subject:content-type; s=fm1; bh=MxyOvMLl95ktMBkCbMfFZ11IUGzG uBuq3YVlZ9Bud88=; b=nVRc+gaMsaB9JcUDdwZ9eRwOC7MDvLZtIPJ3UJS8COsK 701EFjYtgt+V9PiXfOwUcrbza3T3BriPuo37SIafWFMVpJ5K7p4jFMPH0ja5P6CS gjAfP65STMemVkOWQH/g42w6aLthHHVOA/cKUhqK61VbVUowBF6JpY4rXcAPgSFP 7vYrrFf+gNSy06U8cjjrkd6/GtEUHnlFzFmDZ9w1om5Xt1USSB3Zc0aC5I/Y8cfU c+nsxbWPrI0QjSLxd4dM+Du9z+Gi8VgVhy59zKJx/NuPN+wjb9TQgxuTelI6o6aF sDUHYhkbSIsUN0Hw5yDYnHL60ZlZDNwRoHGwSp/Q+g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=MxyOvM Ll95ktMBkCbMfFZ11IUGzGuBuq3YVlZ9Bud88=; b=TP9rISCfVzcyZQPFW7M+ZE HR+e0uhf3VnH/zKrWK+9zp5WhD80OljFuHTRaSlvbarGfO8YxGzlrzXfIZzrZxD3 KJlfidUVv5sp+Pyg4RK67k7Ttu2ADRVR8Gf5y3P3RYZ/9XdObIOx5Rgr8hxH2TWr aDrHuzxrv1cXez5+nio7YCgkk9H5XgXTM2U6ylwoF15z/ivF2y3gFDTGTKpCmn62 F2Ae9bLaaP5CUrluqwPh0ddrTDm5o6Q3uZMLbfvt0EBwmMR+PnCIZytw8srANGwC D9JcqQ9sE+SruupxUuBv0CJtC62qrcSl73NQpjM8gwVsNtT0nrml7H3KbBf1doiw == X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfedtfedggeelucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhepofgfggfkjghffffhvffutgesthdtredtreertdenucfhrhhomhepfdfuvhgv nhcurfgvthgvrhdfuceoshhvvghnsehsvhgvnhhpvghtvghrrdguvghvqeenucggtffrrg htthgvrhhnpefgieegieffuefhtedtjefgteejteefleefgfefgfdvvddtgffhffduhedv feekffenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hsvhgvnhesshhvvghnphgvthgvrhdruggvvh X-ME-Proxy: Received: by mailuser.nyi.internal (Postfix, from userid 501) id B6BE651C0060; Sat, 5 Jun 2021 08:12:51 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.5.0-alpha0-519-g27a961944e-fm-20210531.001-g27a96194 Mime-Version: 1.0 Message-Id: <02176203-7f29-4ff4-933b-70235cf0dd22@www.fastmail.com> In-Reply-To: References: <20210524182745.22923-1-sven@svenpeter.dev> <9ff6ec26-4b78-4684-9c23-16d5cbfef857@www.fastmail.com> <1ff54382-7137-49d6-841d-318e400e956e@www.fastmail.com> Date: Sat, 05 Jun 2021 14:12:31 +0200 From: "Sven Peter" To: "Tony Lindgren" Cc: "Rob Herring" , devicetree@vger.kernel.org, linux-clk , linux-arm-kernel , "linux-kernel@vger.kernel.org" , "Hector Martin" , "Michael Turquette" , "Stephen Boyd" , "Mark Kettenis" , "Arnd Bergmann" Subject: Re: [PATCH 0/3] Apple M1 clock gate driver Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Tony, On Fri, Jun 4, 2021, at 09:43, Tony Lindgren wrote: > Hi, > > How about the following where you set up the gate clocks as separate > child nodes: > > pmgr0: clock-controller@23b700000 { > compatible = "apple,foo-clock-controller"; > #clock-cells = <1>; > reg = <0x2 0x3b700000 0x0 0x4000>; > > clk_uart0: clock@270 { > compatible = "apple,t8103-gate-clock"; > #clock-cells = <0>; > assigned-clock-parents = <&pmgr0 APPLE_CLK_SIO>, > <&pmgr0 APPLE_CLK_UART_P>; > // ... > }; > > }; > > Keep the clock controller still addressable by offset from base as discussed, > and additionally have the driver parse and set up the child node clocks. Nice, I like that one even better! We can keep the internal clocks "hidden" inside the parent node and only need to model the actual consumer clocks as separate nodes. Are you aware of any clock driver that implements something similar? I'd like to avoid reinventing the wheel if it's already been done before. > > Then I think the consumer driver can just do: > > serial0: serial@235200000 { > // ... > clocks = <&clk_uart0>, <&clk24>; > clock-names = "uart", "clk_uart_baud0"; > // ... > }; > > Regards, > > Tony > Best, Sven