From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FFA030C37C for ; Tue, 25 Aug 2026 02:51:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787626304; cv=none; b=JKnPDnVzA+VNxcswi927CIYrjSXZsvMmClfqpsFH6PW0/B38S5DeIvZmr38GS/WjhEAkAeOiMPyeycBKVw6ltUjfJHhwK5A2A+WUFO88UFKyQU0DFXoxUqTD/aZUuTQ48j0vl1Y61HxjY57MryIUMoEpCycjZsQuVUqKDrrfUsY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787626304; c=relaxed/simple; bh=bhE4RuI9V+MVZ2WHKjpClmsRXUuzg8N3aIWaYUU2wA8=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=FoQ74ksMwXK85m4SUbjSN1gkK5+/uMZkdK3X9qOZq9R5jM/4z33kfqeLRmRlGaIPNpju7x2tyMF9OV5241WIbQLtXkFWNSgWjEvVsttzQI7ofcRss64KfxXzKJSkdJRIe1RdWhyVMzxXT75BnJKHh8bPalaDBUzJkrJYB0ZKNMg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=feqQQeXJ; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=Q1usSyLw; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="feqQQeXJ"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="Q1usSyLw" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67P2QrH8606582 for ; Tue, 25 Aug 2026 02:51:40 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= UoErnvSWXkC4s7oreViW8HAdb+aeLpfKk8vSmTkAGRw=; b=feqQQeXJqunMp8tn 28O5T0KIdAH6Ee0GMHEZj0h6QOF9q5+St8ZBtDvv4+dii9xnX0Mqx+QCjvL/oEWK OKZpd+y5CnbB3IxbG7yKZdyeZ64zDwR3auTDB+FaWxeMN/Y5nt53scfkiCoibUjO OFSbeKnTbLJYPNALXv+wKbCNVvGvAcu2C1GGYo2Ovqje2RsTRksaXlEhib9ch68A mD7xhoyakqrV8MTDOnd732qMopbV9ej4iBF1UoCJQYUt8h/Z4IfYBoWfWsuHEQoj eSGrmdjTqvnBruVjLcd4Q9PIy5vUudZMupKL3OP3iEuJeucm8AEosaQeu0nCMbLD iU4maw== Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4g8swy1vh3-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 25 Aug 2026 02:51:40 +0000 (GMT) Received: by mail-pj1-f72.google.com with SMTP id 98e67ed59e1d1-38dbe39ce62so380976a91.0 for ; Mon, 24 Aug 2026 19:51:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1787626300; x=1788231100; darn=vger.kernel.org; h=content-transfer-encoding:content-type:in-reply-to:from :content-language:references:cc:to:subject:user-agent:mime-version :date:message-id:from:to:cc:subject:date:message-id:reply-to :content-type; bh=UoErnvSWXkC4s7oreViW8HAdb+aeLpfKk8vSmTkAGRw=; b=Q1usSyLwJq0t07N/cdRTfGAqQCZsNL669P0RogM1q691XWeavYOukQfk+iLcoPwnHk tFkinIijBbIDpxaJZk1LdeWZzsb5Dj2CyNxZz1ktI+pmePfBxkEo99l7zYbsIOVrUBVD IaeR6fBnHFWeA2iTnsJuZV4LuoP9y2OmR7yItTe3+D3Eh0YN2v1FbGhkY8yk7fhugNRa hmBJT3KCbx0ChWb9wwYnVTw4KpJNU16pIyPy2VwkzitdYU6fuRw9+wrkEzE88gaOslXP BoGZND0bouL2uvPBI6ICDzK5/veSsZGeUovY6w1hJdsyq8bkjmAtEy0kW3Kdppp19Lw+ AqwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787626300; x=1788231100; h=content-transfer-encoding:content-type:in-reply-to:from :content-language:references:cc:to:subject:user-agent:mime-version :date:message-id:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to:content-type; bh=UoErnvSWXkC4s7oreViW8HAdb+aeLpfKk8vSmTkAGRw=; b=TxE+F3eND70+FGXmExIiouB9vRRT7fY3k58cAfMwUomvOoOcRCBST8sg0E5s6Jjc3u 9JVHsw7mHhSLbDtEs6oUKJ4bZaqyrif/GGE0lp+KiaSxWVbdWt7mn95lSBHK0DIZ//Ty EkEVsiRkocVrofybakj+A6CGWdXYP2CJRrR9GsmCmhhI4IBRMYeYKWyXeqJjRVJn28iv YONtgHq8yVNQ9JVVX5yBwSuXmYEV+aN6v4ScRZyXTlj+4xvQoaCJvUTB3Lpt+ssn9e35 jZIPO/LatQESCNWoF9x/k1WHE3ZcyzAT7307kdYyMiQJ3ygwRlGXrQT5wrJS7E3UW5nN r1ig== X-Forwarded-Encrypted: i=1; AHgh+Rq0Ewyf+H5w29FXULgSNDIivL4bM9EZIvtL3Go/YcHvL9mO5ovRQdQIbYVRmGLJeaiYgnrNPdVn+9WKQJc=@vger.kernel.org X-Gm-Message-State: AFuF++kHBEfN0duXFcLHVQ58HvdlGS0rJmLM0D0y+Y7nmRlqGLEJf6QZ SLLujCA6J40nCzY8OSsjYFsE+IjYBfeLTSloHEIS2usYoVEQj2LlMOy8kO3/Ubyyl3PCYWVVkmL IPheNbXPIK/gtzyni082oCPv5AYsEaiNeCzvPFOckycj1uRBYB0NcKlwKnSpU1X3wOSA= X-Gm-Gg: AR+sD10Fx2vzHDNlxodCu07ioIRxeaBgOvwGhQe0fVBE0BM6VJ2xvPp1twfzATjY2jJ lFgFg0G7n9daCjLrulxF2t8OdhOYOtPP5g7Zo7tH+eBo4xrDVI4OJfUJ1pCq8TTWbYGVefBJsN+ Y6RdGSGRtLv2LY6zlENbFHBnSx6suouerpL/rSXpEECZ1mPo3Z6K6ranSqy8jXvG2eHgoV8U6Vf O0bghxbFMWJxr8etnw4RbuxIA0vn+oWOaJsEY/HsDE6GgpkzDZX9/l7tPz9jfmjUe3k5NyOgLRf 5kxfpUG+IGgP2QiTS0ezFwH7rv/CAo9H1dX9codKPd+nM64diHKL8ef94RI1L8/HN67e18xup2I h3ZgvZ4iSBycHPkJfYXcwKJ0tZsI88eWUoaN8pKNgLTdvuYWuRa6D9fXwNPMqspgAYlGT X-Received: by 2002:a17:90b:2543:b0:395:8124:ac53 with SMTP id 98e67ed59e1d1-39645aaa837mr3945698a91.6.1787626299604; Mon, 24 Aug 2026 19:51:39 -0700 (PDT) X-Received: by 2002:a17:90b:2543:b0:395:8124:ac53 with SMTP id 98e67ed59e1d1-39645aaa837mr3945666a91.6.1787626299087; Mon, 24 Aug 2026 19:51:39 -0700 (PDT) Received: from [10.133.33.69] (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39645d69f74sm1713636a91.14.2026.08.24.19.51.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 Aug 2026 19:51:38 -0700 (PDT) Message-ID: <02269d67-41e3-48eb-9ce1-e3775a4c2eaa@oss.qualcomm.com> Date: Tue, 25 Aug 2026 10:51:34 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 1/2] dt-bindings: input: Add Qualcomm SPMI PMIC haptics To: Rob Herring Cc: linux-arm-msm@vger.kernel.org, Dmitry Torokhov , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Stephen Boyd , Bjorn Andersson , Konrad Dybcio , David Collins , Subbaraman Narayanamurthy , Kamal Wadhwa , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski References: <20260806-qcom-spmi-haptics-v6-0-19fcecd5204f@oss.qualcomm.com> <20260806-qcom-spmi-haptics-v6-1-19fcecd5204f@oss.qualcomm.com> <20260807155640.GA893689-robh@kernel.org> Content-Language: en-US From: Fenglin Wu In-Reply-To: <20260807155640.GA893689-robh@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI1MDAyMyBTYWx0ZWRfX6iwmGaZ2LIjW 25VsDDLp4M4qy8fySMmBYKcQB+iya0A4y8kP7VDGBsk6LTxqN/w1VHDbx99kNhnezGeoC+U4bda dcllo4ByRGp2v5g242AZ6QRRh9TrBCcV87R8DLHaBbP5Nut9/iPzaBp6Th+mQZ2gjbIxaZGW/U4 8k2J+b2dY36GMIuq8ym8c4M5MC3cwtRRoU5DeYx2e3QDRiduT3wVQOBpMBh/Gs4Ck4htY8A/8z2 I3vnBSzFSmcx7Ki3odriPAeIpXj1DohYS9ttNi0nyjRcgUHVal50c9AKtF7JRyUek9pFIAVWWQy eZIaEneSSILbcDK1mB3h9z0H3cKwDuX3h0a/gcTkkFjyMmRFNhJJAI9BBKN8eEOc75gmUJ6G7Cp QPfKJgfRhbQHKn/DaM/t88q+vedYzNOe1C+sOiDtsR+lHntOXUXKmAOfZaAX/h9aPDi6h8D1Eno dU8WiZDXA/U6bn/nG6g== X-Proofpoint-Spam-Info: AW1haW4tMjYwODI1MDAyMyBTYWx0ZWRfX19hucZ5K6xpP dPnuscWWb2nh4dDIX6YKHuuAfA4NJfjYnMVb2vqVVbrXqEEjt2jSKclAI69hwHD09K/f6erXv+x /pqm8uh0QUxI00bOQUedR92bsPlDdGI= X-Proofpoint-ORIG-GUID: SP9MWvTgltn6JF9L_i3PbDchI3hCV8h3 X-Proofpoint-GUID: SP9MWvTgltn6JF9L_i3PbDchI3hCV8h3 X-Authority-Analysis: v=2.4 cv=QIlYgALL c=1 sm=1 tr=0 ts=6a8d033c cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=gEfo2CItAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=HhSylQvuivqysCgRbxUA:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-25_01,2026-08-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 suspectscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 adultscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608250023 On 8/7/2026 11:56 PM, Rob Herring wrote: > On Thu, Aug 06, 2026 at 11:21:40PM -0700, Fenglin Wu wrote: >> Add binding document for the haptics module inside Qualcomm PMIC >> PMIH0108. >> >> Assisted-by: Claude:claude-4-8-opus >> Reviewed-by: Krzysztof Kozlowski >> Signed-off-by: Fenglin Wu >> --- >> .../bindings/input/qcom,spmi-haptics.yaml | 136 +++++++++++++++++++++ >> 1 file changed, 136 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml b/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml >> new file mode 100644 >> index 000000000000..b1a69e9886ee >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml >> @@ -0,0 +1,136 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/input/qcom,spmi-haptics.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Haptics device inside Qualcomm Technologies, Inc. PMIC >> + >> +maintainers: >> + - Fenglin Wu >> + >> +description: | >> + Certain Qualcomm PMICs integrate a haptics module, such as the HAP530_HV haptics >> + module in the PMIH0108 PMIC, which drives an LRA (Linear Resonant Actuator) with >> + an output voltage up to 10 V. Several play modes are supported in HAP530_HV: >> + >> + DIRECT_PLAY: The hardware outputs sinusoidal waveforms whose period is >> + defined by qcom,lra-period-us and whose peak voltage is defined by >> + qcom,vmax-microvolt. The driving amplitude can be scaled in the range >> + [0, 255] via a single register byte. Hardware-based LRA auto-resonance >> + tracking is enabled by default in this mode, allowing the haptics engine >> + to follow the actual resonant frequency of the LRA and update the driving >> + period accordingly to achieve stronger vibration magnitude. >> + >> + FIFO: The hardware can play an arbitrary waveform composed of a sequence >> + of 8-bit samples at a configurable play rate. Samples are pre-filled >> + into the internal FIFO memory of the haptics module and continuously >> + replenished via the FIFO-empty IRQ until all samples have been played. >> + An 8K-byte FIFO memory bank is available in the HAP530_HV haptics module, >> + shared between the FIFO and PAT_MEM play modes. The memory partition >> + between the two modes is configurable via registers, and FIFO mode always >> + uses the 1st partition starting from offset 0. >> + >> + PAT_MEM: This mode is very similar to FIFO streaming mode but without the >> + data refilling capability. It is designed mainly for short, latency-critical >> + vibrations. The memory space for PAT_MEM mode must be reserved for dedicated >> + usage, and the waveform data should be preloaded and remain unchanged >> + thereafter. The haptics module can play the waveform data from the memory >> + region specified by the PAT_MEM play start address and length registers. >> + >> + In either FIFO mode or PAT_MEM mode, the following play rates are supported: >> + -- 0(T_LRA): each FIFO byte drives one full sinusoidal cycle with the >> + period defined in qcom,lra-period-us. >> + -- 1/2/3(T_LRA_DIV_2/4/8): each FIFO byte drives a half/quarter/eighth >> + sinusoidal cycle with the period defined in qcom,lra-period-us. >> + -- 4/5/6(T_LRA_X_2/4/8): each FIFO byte drives 2/4/8 sinusoidal cycles >> + with the period defined in qcom,lra-period-us. >> + -- 8/9/10/11/12/13(8KHz/16KHz/24KHz/32KHz/44.1KHz/48KHz): the FIFO >> + data is treated as PCM samples and drives the output with an >> + arbitrarily shaped waveform. This mode is typically used to define >> + custom driving waveforms for specific vibration effects such as fast >> + attack, crisp brake, etc. >> + >> + The drive voltage in FIFO or PAT_MEM mode can exceed the value defined in >> + qcom,vmax-microvolt to achieve a special vibration effect, but the waveform >> + must be short enough to prevent the LRA from being damaged by operating at >> + an overvoltage. >> + >> + Also, hardware-based LRA auto-resonance tracking is normally disabled in >> + FIFO or PAT_MEM mode, as these modes are intended to drive arbitrary >> + waveforms that may not follow the resonant frequency; autonomous hardware >> + resonance correction would interfere with the intended output. >> + >> +properties: >> + compatible: >> + items: >> + - const: qcom,pmih0108-haptics >> + - const: qcom,spmi-haptics >> + >> + reg: >> + items: >> + - description: HAP_CFG module base address >> + - description: HAP_PTN module base address >> + >> + reg-names: >> + items: >> + - const: cfg >> + - const: ptn >> + >> + interrupts: >> + maxItems: 1 >> + >> + interrupt-names: >> + items: >> + - const: fifo-empty >> + >> + qcom,vmax-microvolt: >> + description: >> + Maximum allowed output driving voltage in microvolts, must be a multiple >> + of 50,000 uV. This is the peak driving voltage in DIRECT_PLAY mode, >> + which outputs sinusoidal waveforms. The value should be equal to the >> + square root of 2 times the Vrms voltage of the LRA. >> + minimum: 50000 >> + maximum: 10000000 >> + multipleOf: 50000 >> + >> + qcom,lra-period-us: >> + description: >> + LRA actuator initial resonance period in microseconds >> + (1,000,000 / resonant_freq_hz). Used to configure T_LRA-based play >> + rates and the auto-resonance zero-crossing window. It could be also used >> + as the initial period if the LRA wants to be driven off resonance. >> + minimum: 5 >> + maximum: 20475 >> + multipleOf: 5 >> + >> +required: >> + - compatible >> + - reg >> + - reg-names >> + - interrupts >> + - interrupt-names >> + - qcom,vmax-microvolt >> + - qcom,lra-period-us >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include >> + >> + pmic { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + haptics@f000 { > > No incomplete examples please. Put this in the example for the PMIC. Thanks for the suggestion. I will change to below in next patch: pmic@7 { compatible = "qcom,pmih0108", "qcom,spmi-pmic"; reg = <0x7 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; haptics@f000 { compatible = "qcom,pmih0108-haptics", "qcom,spmi-haptics"; reg = <0xf000>, <0xf100>; reg-names = "cfg", "ptn"; interrupts = <0x7 0xf0 0x1 IRQ_TYPE_EDGE_RISING>; interrupt-names = "fifo-empty"; qcom,vmax-microvolt = <1300000>; qcom,lra-period-us = <5880>; }; }; > > And please comment on sashiko report. Looks valid to me. I just replied on that. I dropped the change which added the haptics device in the spmi-pmic schema as it had been applied: https://lore.kernel.org/linux-input/178602255123.2917765.7426706813083510078.b4-ty@b4/ > > Rob