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> + reg = <0x0 0x0a200000 0x0 0xfc100>; > + > + clocks = <&gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK>, > + <&gcc GCC_USB20_MASTER_CLK>, > + <&gcc GCC_AGGRE_USB2_PRIM_AXI_CLK>, > + <&gcc GCC_USB20_SLEEP_CLK>, > + <&gcc GCC_USB20_MOCK_UTMI_CLK>, > + <&gcc GCC_CFG_NOC_USB_ANOC_AHB_CLK>, > + <&gcc GCC_CFG_NOC_USB_ANOC_SOUTH_AHB_CLK>; > + clock-names = "cfg_noc", > + "core", > + "iface", > + "sleep", > + "mock_utmi", > + "noc_aggr_north", > + "noc_aggr_south"; > + > + assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, > + <&gcc GCC_USB20_MASTER_CLK>; > + assigned-clock-rates = <19200000>, <200000000>; > + > + interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>, > + <&pdc 92 IRQ_TYPE_EDGE_BOTH>, > + <&pdc 57 IRQ_TYPE_EDGE_BOTH>, > + <&intc GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "dp_hs_phy_irq", > + "dm_hs_phy_irq", > + "hs_phy_irq"; > + > + resets = <&gcc GCC_USB20_PRIM_BCR>; > + > + power-domains = <&gcc GCC_USB20_PRIM_GDSC>; > + required-opps = <&rpmhpd_opp_nom>; Please ensure that the rail (CX rail?) is scaled. Otherwise, it will impact other subsystems using the same rail (eg: GPU). Similar discussion here for SM8750 but not sure if there is a plan to fix : https://lore.kernel.org/lkml/e70cfecc-b2c7-4f09-8d87-6a7e0160769b@oss.qualcomm.com/ -Akhil. > + > + iommus = <&apps_smmu 0x0ce0 0x0>; > + > + interconnects = <&aggre3_noc MASTER_USB2 QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, > + <&hsc_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY > + &config_noc SLAVE_USB2 QCOM_ICC_TAG_ACTIVE_ONLY>; > + interconnect-names = "usb-ddr", > + "apps-usb"; > + > + phys = <&usb_hs_phy>; > + phy-names = "usb2-phy"; > + > + snps,hird-threshold = /bits/ 8 <0x0>; > + snps,dis-u1-entry-quirk; > + snps,dis-u2-entry-quirk; > + snps,is-utmi-l1-suspend; > + snps,usb3_lpm_capable; > + snps,has-lpm-erratum; > + tx-fifo-resize; > + snps,dis_u2_susphy_quirk; > + snps,dis_enblslpm_quirk; > + > + dr_mode = "host"; > + > + maximum-speed = "high-speed"; > + > + status = "disabled"; > + }; > + > + usb_mp: usb@a400000 { > + compatible = "qcom,glymur-dwc3-mp", "qcom,snps-dwc3"; > + reg = <0x0 0x0a400000 0x0 0xfc100>; > + > + clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>, > + <&gcc GCC_USB30_MP_MASTER_CLK>, > + <&gcc GCC_AGGRE_USB3_MP_AXI_CLK>, > + <&gcc GCC_USB30_MP_SLEEP_CLK>, > + <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>, > + <&gcc GCC_CFG_NOC_USB_ANOC_AHB_CLK>, > + <&gcc GCC_CFG_NOC_USB_ANOC_SOUTH_AHB_CLK>; > + clock-names = "cfg_noc", > + "core", > + "iface", > + "sleep", > + "mock_utmi", > + "noc_aggr_north", > + "noc_aggr_south"; > + > + interrupts-extended = <&intc GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, > + <&pdc 12 IRQ_TYPE_LEVEL_HIGH>, > + <&pdc 11 IRQ_TYPE_LEVEL_HIGH>, > + <&pdc 14 IRQ_TYPE_LEVEL_HIGH>, > + <&pdc 13 IRQ_TYPE_LEVEL_HIGH>, > + <&pdc 78 IRQ_TYPE_LEVEL_HIGH>, > + <&pdc 77 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event_1", > + "pwr_event_2", > + "hs_phy_1", > + "hs_phy_2", > + "dp_hs_phy_1", > + "dm_hs_phy_1", > + "dp_hs_phy_2", > + "dm_hs_phy_2", > + "ss_phy_1", > + "ss_phy_2"; > + > + resets = <&gcc GCC_USB30_MP_BCR>; > + power-domains = <&gcc GCC_USB30_MP_GDSC>; > + > + iommus = <&apps_smmu 0xda0 0x0>; > + > + phys = <&usb_mp_hsphy0>, > + <&usb_mp_qmpphy0>, > + <&usb_mp_hsphy1>, > + <&usb_mp_qmpphy1>; > + phy-names = "usb2-0", > + "usb3-0", > + "usb2-1", > + "usb3-1"; > + > + snps,hird-threshold = /bits/ 8 <0x0>; > + snps,dis-u1-entry-quirk; > + snps,dis-u2-entry-quirk; > + snps,is-utmi-l1-suspend; > + snps,usb3_lpm_capable; > + snps,has-lpm-erratum; > + tx-fifo-resize; > + snps,dis_u2_susphy_quirk; > + snps,dis_enblslpm_quirk; > + > + dr_mode = "host"; > + > + status = "disabled"; > + }; > + > + > dispcc: clock-controller@af00000 { > compatible = "qcom,glymur-dispcc"; > reg = <0x0 0x0af00000 0x0 0x20000>; >