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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: James Clark <james.clark@arm.com>,
	coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.linux.dev, maz@kernel.org
Cc: broonie@kernel.org, Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Mike Leach <mike.leach@linaro.org>,
	Leo Yan <leo.yan@linaro.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Rob Herring <robh@kernel.org>,
	Jintack Lim <jintack.lim@linaro.org>,
	Kristina Martsenko <kristina.martsenko@arm.com>,
	Fuad Tabba <tabba@google.com>,
	Akihiko Odaki <akihiko.odaki@daynix.com>,
	Joey Gouly <joey.gouly@arm.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 4/6] arm64: KVM: Add interface to set guest value for TRFCR register
Date: Wed, 22 Nov 2023 18:10:02 +0000	[thread overview]
Message-ID: <02692fd9-d184-4b33-9f45-dd62593064e5@arm.com> (raw)
In-Reply-To: <0ebe2a54-8111-4e8e-8afe-3e17ce85fcb9@arm.com>

On 16/11/2023 19:26, Suzuki K Poulose wrote:
> On 19/10/2023 17:55, James Clark wrote:
>> Add an interface for the Coresight driver to use to set the value of the
>> TRFCR register for the guest. This register controls the exclude
>> settings for trace at different exception levels, and is used to honor
>> the exclude_host and exclude_guest parameters from the Perf session.
>> This will be used to later write TRFCR_EL1 on nVHE at guest switch. For
>> VHE, the host trace is controlled by TRFCR_EL2 and thus we can write to
>> the TRFCR_EL1 immediately. Because guest writes to the register are
>> trapped, the value will persist and can't be modified.
> 
> This could also be added below to make it easier for the code reader.
> 
>>
>> The settings must be copied to the vCPU before each run in the same
>> way that PMU events are, because the per-cpu struct isn't accessible in
>> protected mode.
>>
>> Signed-off-by: James Clark <james.clark@arm.com>
>> ---
>>   arch/arm64/include/asm/kvm_host.h |  3 +++
>>   arch/arm64/kvm/arm.c              |  1 +
>>   arch/arm64/kvm/debug.c            | 26 ++++++++++++++++++++++++++
>>   3 files changed, 30 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/kvm_host.h 
>> b/arch/arm64/include/asm/kvm_host.h
>> index 0f0bf8e641bd..e1852102550d 100644
>> --- a/arch/arm64/include/asm/kvm_host.h
>> +++ b/arch/arm64/include/asm/kvm_host.h
>> @@ -1125,6 +1125,8 @@ void kvm_arch_vcpu_put_debug_state_flags(struct 
>> kvm_vcpu *vcpu);
>>   void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr);
>>   void kvm_clr_pmu_events(u32 clr);
>>   bool kvm_set_pmuserenr(u64 val);
>> +void kvm_etm_set_guest_trfcr(u64 trfcr_guest);
>> +void kvm_etm_update_vcpu_events(struct kvm_vcpu *vcpu);
>>   #else
>>   static inline void kvm_set_pmu_events(u32 set, struct 
>> perf_event_attr *attr) {}
>>   static inline void kvm_clr_pmu_events(u32 clr) {}
>> @@ -1132,6 +1134,7 @@ static inline bool kvm_set_pmuserenr(u64 val)
>>   {
>>       return false;
>>   }
>> +static inline void kvm_etm_set_guest_trfcr(u64 trfcr_guest) {}
>>   #endif
>>   void kvm_vcpu_load_sysregs_vhe(struct kvm_vcpu *vcpu);
>> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
>> index 0f717b6a9151..e4d846f2f665 100644
>> --- a/arch/arm64/kvm/arm.c
>> +++ b/arch/arm64/kvm/arm.c
>> @@ -1015,6 +1015,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
>>           kvm_vgic_flush_hwstate(vcpu);
>>           kvm_pmu_update_vcpu_events(vcpu);
>> +        kvm_etm_update_vcpu_events(vcpu);
>>           /*
>>            * Ensure we set mode to IN_GUEST_MODE after we disable
>> diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c
>> index 20cdd40b3c42..2ab41b954512 100644
>> --- a/arch/arm64/kvm/debug.c
>> +++ b/arch/arm64/kvm/debug.c
>> @@ -23,6 +23,12 @@
>>   static DEFINE_PER_CPU(u64, mdcr_el2);
>> +/*
>> + * Per CPU value for TRFCR that should be applied to any guest vcpu 
>> that may
>> + * run on that core in the future.
>> + */
>> +static DEFINE_PER_CPU(u64, guest_trfcr);
>> +
>>   /**
>>    * save/restore_guest_debug_regs
>>    *
>> @@ -356,3 +362,23 @@ void kvm_arch_vcpu_put_debug_state_flags(struct 
>> kvm_vcpu *vcpu)
>>       vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRBE);
>>       vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRFCR);
>>   }
>> +
> 
> The comment in the description could be helpful here.
> 
>> +void kvm_etm_set_guest_trfcr(u64 trfcr_guest)
>> +{
>> +    if (has_vhe())

I am wondering if "kvm" should do the extra safety check of
making sure that the FEAT_TRF is available on the CPU, before
actually writing to the register ? coresight calls this only
when the FEAT_TRF is implemented. But given this is an exported
function, may be we should be extra careful ?

Suzuki



>> +        write_sysreg_s(trfcr_guest, SYS_TRFCR_EL12);
>> +    else
>> +        *this_cpu_ptr(&guest_trfcr) = trfcr_guest;
>> +}
>> +EXPORT_SYMBOL_GPL(kvm_etm_set_guest_trfcr);
>> +
>> +/*
>> + * Updates the vcpu's view of the etm events for this cpu. Must be
>> + * called before every vcpu run after disabling interrupts, to ensure
>> + * that an interrupt cannot fire and update the structure.
>> + */
>> +void kvm_etm_update_vcpu_events(struct kvm_vcpu *vcpu)
>> +{
>> +    if (!has_vhe() && vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRFCR))
>> +        ctxt_sys_reg(&vcpu->arch.ctxt, TRFCR_EL1) = 
>> *this_cpu_ptr(&guest_trfcr);
>> +}
> 
> Either way,
> 
> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>


  reply	other threads:[~2023-11-22 18:10 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-19 16:54 [PATCH v3 0/6] kvm/coresight: Support exclude guest and exclude host James Clark
2023-10-19 16:54 ` [PATCH v3 1/6] arm64/sysreg: Move TRFCR definitions to sysreg James Clark
2023-10-19 16:55 ` [PATCH v3 2/6] arm64: KVM: Move SPE and trace registers to the sysreg array James Clark
2023-12-04  9:29   ` Marc Zyngier
2023-12-04 16:17     ` James Clark
2023-10-19 16:55 ` [PATCH v3 3/6] arm64: KVM: Add iflag for FEAT_TRF James Clark
2023-11-16 19:27   ` Suzuki K Poulose
2023-12-04  9:48   ` Marc Zyngier
2023-12-05 10:05     ` Suzuki K Poulose
2023-10-19 16:55 ` [PATCH v3 4/6] arm64: KVM: Add interface to set guest value for TRFCR register James Clark
2023-11-16 19:26   ` Suzuki K Poulose
2023-11-22 18:10     ` Suzuki K Poulose [this message]
2023-11-24 15:04     ` James Clark
2023-12-04  9:59   ` Marc Zyngier
2023-12-05  9:54     ` James Clark
2023-10-19 16:55 ` [PATCH v3 5/6] arm64: KVM: Write TRFCR value on guest switch with nVHE James Clark
2023-11-16 19:27   ` Suzuki K Poulose
2023-10-19 16:55 ` [PATCH v3 6/6] coresight: Pass guest TRFCR value to KVM James Clark
2023-11-16 19:37   ` Suzuki K Poulose
2023-11-24 11:24     ` James Clark

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