From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2908A3DB312 for ; Thu, 11 Jun 2026 11:23:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781176984; cv=none; b=N9457qvrnnOl7W5daWGfFiE+O8mUvKXV35XwWj8fiF+IsdQjb9LMRVRuTSJllhONd3OCnkMS/F5tlM8qa/hhpp6c7kDqwyWQUW7sPLD18zRcW16GebiocujuEDkyOE54lo6fHZb2rzKZZ5ptkpPZpj7W4+BH42+NkKxOas/DdsM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781176984; c=relaxed/simple; bh=7IxRaQGWMti15l16w9inD3a87Oomi9WL8xah4r134G0=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=uf4FDcE3n3DNX5ZkANLDi5oe8pH5wBmClzbcj5ctASp3ReLRYwufvBigIKntkoHP5rBvmeppNr8YLdIKXWpb0xkk4a+ZfQ5vTb0+06VU9WzoQoTSNs7UICvqAIJ08K4jNjgxJ9ZXOoZ2GpgSOmbbNXvl/kRiq2Pd6HZaIMWhh0A= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=gpXraFsG; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=JAI8RFIF; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="gpXraFsG"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="JAI8RFIF" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65B9xBfk263545 for ; Thu, 11 Jun 2026 11:23:01 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= SaKwPTwmtjNWwhHDC+xVFQqCU8K9rJPAsqnciZvdJfA=; b=gpXraFsGVhXUEibG X8Oqdpr8v/Qd2tk+V4gV6TWSHum2ZWT3NsVKagjuVEuXt1/NY8UPtpJdcnS/tpc7 jZS+N05sZA2ykrcGgR+2x/hnEcA/tndCRiX2yEEsXbh0RBsWEH8msmIfe6Mzd25K bHzQw1fMEeyij3O0DzHBki22T3zLAa3XVTnOJQ8uhqtkTq17tMciwZlU2Bt/qSVs Bea+mR1GBsCg+t5la1dpai7LupH+HnU+DxsNXxQvkbzhzmCsL2TUUkQHOBwl1RO2 Rt/HicWmMximkEO92PI72HS4qevk/Z616pk7Q/6amIJl5fHJogqvRbzc5mFxg060 B6YknA== Received: from mail-qt1-f200.google.com (mail-qt1-f200.google.com [209.85.160.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4eqe6uu4d1-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 11 Jun 2026 11:23:01 +0000 (GMT) Received: by mail-qt1-f200.google.com with SMTP id d75a77b69052e-517865e6219so17114631cf.0 for ; Thu, 11 Jun 2026 04:23:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1781176980; x=1781781780; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=SaKwPTwmtjNWwhHDC+xVFQqCU8K9rJPAsqnciZvdJfA=; b=JAI8RFIFDHnHH55vucGLs+D1l297sTfMDrHvF38eKo5cqQPYaNYv9J8NnHbYzn8uO1 05tPxXxOXdY8HO6dLuNgGKe9TZx1Cd6NsQ5p81V3BcFpuYr8IqWmYbwFuzeemzX0Ljsb U6z3Q+agIrEIfwhlEpbxCFMTQPX+ulY2mrp2MaV+CA20sfRC8p94VG2ovIdQJD+S751N QJkT185rJst303WcSJhCejEf2/nfu7kNXBYTkidUlGaQSdo7WYiOWICPLzu3xLzLyJc9 e+LzCH+p8kWgfxjlPv77dNn2fno0Ls3aTbQBiMB4cStPpJN8nSqmOJ5B5oC7qkAaoj7p pUcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781176980; x=1781781780; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=SaKwPTwmtjNWwhHDC+xVFQqCU8K9rJPAsqnciZvdJfA=; b=YTFshxjcRyeJdWpYI4JCoWyT0jTbsob5E0/8igNzeWKpktDIKMlVBT5c8J8NRMjyDw PQeHRPyK0ZsNxcUJRRZmOE4jAHsbzLV/rNv1JB78vM2wozwOGr1aTw1fSG10e5W8megl VtgY7OrCA24xNSte6hmiSKlpPcJntZfXZ1Vn3N5hK0lqvtOsmB4Kpn7nEdV6Nvn34VH4 oOI3mxRprn9kc+uVTwh/t+POjki6/3U6E9lNWF2k6FzYINscYP9cnGaguZ8DRGYa1RwC P0LTftJykhra4IyFEu8dD+qkQ/sD1zYC2uzqbfsF6bTNBbv6nAZrczDeCLkuEnNs42RI yLJw== X-Forwarded-Encrypted: i=1; AFNElJ/mnVTXwtbhJinE8QoNbCPrHQo43bhbj+mKSEu9nlHJdLLO0LSjk3+WJ5dzR/BHd74+M+IXUFdvwIN9EwQ=@vger.kernel.org X-Gm-Message-State: AOJu0Yx5aHExzpLDQtuKtGy5gRCAGsfndJaEperP3YlqKB31sJUU9ttl NRzzWgtnAe8T8ddRWI8JaHVEv4g87R4E6BESaa/oJhNW+M/9UhuvfgNrpaj1DuyUAeA6yPSOgKl 52bqNUlJH5d2/4YPWQwhN3ijwOYSLwXcgHm8+ETPXCP1k1t7Zb9zNBQoM7mzESHZqOsk= X-Gm-Gg: Acq92OFqvxRJqpp4lF3ya0HBsnkKU6pwSMi9zsdIjR+fCjDcFsOAthByr8+ESICFFhW xrGJSlEzl6I8WPqt5MgSKqdSUOvzMjMRbL0HhHsNChCGKCDSEmG+clMsui9V4sdQXSrfCN1E6I3 JygVkGyT9qqHLrglzzZzYfEgLFE2zBSP0jmrQjwfxrYT7hwW4OHlvRs2s/qy+v8K07tbVyooeQQ +qQ46MzqAM3PvxXToMbuMtqri+XKnaL/Q7k+x0R8VDr54t6CKWOD1NHVqMUPCCABauXGnleY9Y4 kiqDxolIrz6J8qpMYcqLzbm3+91yQDLyLNmqYkJw/au92bs/gLCDaVlrY7s8wd/JMZ9M1L6ku/O RWNKGgHuzYa0TbfY1X4fTakAQxEEIeQBZPJTz1SNEXxjItiXPmEfAOgdH X-Received: by 2002:a05:622a:1f18:b0:50b:2875:5782 with SMTP id d75a77b69052e-517ee2375f4mr19937661cf.6.1781176980376; Thu, 11 Jun 2026 04:23:00 -0700 (PDT) X-Received: by 2002:a05:622a:1f18:b0:50b:2875:5782 with SMTP id d75a77b69052e-517ee2375f4mr19937351cf.6.1781176979892; Thu, 11 Jun 2026 04:22:59 -0700 (PDT) Received: from [192.168.120.170] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bfcb0f15621sm52097166b.13.2026.06.11.04.22.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 11 Jun 2026 04:22:59 -0700 (PDT) Message-ID: <02a767ef-0d6e-476e-a535-52b55d082b65@oss.qualcomm.com> Date: Thu, 11 Jun 2026 13:22:56 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] clk: qcom: Add Audio Core clock controller support on Qualcomm Shikra SoC To: Imran Shaik , Bjorn Andersson , Michael Turquette , Stephen Boyd , Brian Masney , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20260605-shikra-audiocorecc-v1-0-7ee6b5f2d928@oss.qualcomm.com> <20260605-shikra-audiocorecc-v1-3-7ee6b5f2d928@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260605-shikra-audiocorecc-v1-3-7ee6b5f2d928@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=FJ8rAeos c=1 sm=1 tr=0 ts=6a2a9a95 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=9j2NjNoUcPKmTTtl3isA:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNjExMDExMyBTYWx0ZWRfX6qxG7FLRwrid xmcK76DtuVv4lKIyWCKwzf3KgO39VdgNNxu/QOspt2+5UMlKkLVE7epet0wHyGBGHsDdijENOjt rDPmL9ZGv0qORcrH/H+h95LhkwO0EVw= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjExMDExMyBTYWx0ZWRfX0gK3FdkcgMBR a805maYau2gFDBAcmGEyPTRlMh1oP31bl/oUCkMy24oeC9O+MFzD+A4JapH6f7eQFtl/+L9jbtI Ha/nECN+hcB0nro1ewLy2j3cl6w+4Md7BtgX6C4scJjHMBnSLvWsuwSt387esvP2oxAZOQ4W0XS hHvVqlEbI3VQkLVoBT2nHc6/ku2NanIDJPNMRX04HPL9USv05BvJ+6rzesBWOGimaZrbsuJgtcP 913Mu1pz9hUlkhY0XHpgqAjqx5jJQ0ttqSawBjgP1TEHgFQyrzBa4Mj9lHvsbwRlqAHTZvDhmZu bxzlI4ozeGRlHYokGLkj89Q/WPaRtYtdfEKsNjDKvIETj9jFbj4mYcDZhr0CFmYxH7DeX5SZONQ Xsg1zwktY+5bUN9OU/jsVCL7KKUw3wVisMv4M1sqgf3EjGE39h0fwKKmx1eXVuPlQBJReGQsCiV F07pzjfqNvrRM+mBqRQ== X-Proofpoint-GUID: AXrUMyfQ5dVZj3i97mVFxD1HOsGhupJL X-Proofpoint-ORIG-GUID: AXrUMyfQ5dVZj3i97mVFxD1HOsGhupJL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-11_02,2026-06-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 spamscore=0 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606040000 definitions=main-2606110113 On 6/5/26 1:26 PM, Imran Shaik wrote: > Add support for Audio Core Clock Controller (AUDIOCORECC) on Qualcomm > Shikra SoC. The AUDIOCORECC clocks and resets support differs based on > Audio subsystem enablement. In the CQM variant, both clocks and resets > are required as Audio is on APPS, while in the CQS variant only reset > control is required since Audio is handled on Modem. Handle these > requirements using variant specific compatibles. > > Signed-off-by: Imran Shaik > --- [...] > +static int audio_core_cc_shikra_probe(struct platform_device *pdev) > +{ > + int ret; > + > + ret = qcom_cc_probe_by_index(pdev, 1, &audio_core_cc_shikra_reset_desc); > + if (ret) > + return ret; > + > + if (device_is_compatible(&pdev->dev, "qcom,shikra-cqs-audiocorecc")) > + return 0; > + > + return qcom_cc_probe(pdev, &audio_core_cc_shikra_desc); > +} If the clock list is complete and you pinky-promise to never extend it, we can simply go with a single compatible and use protected-clocks in DT to avoid accessing any of these registers (sorta like kodiak GCC), removing the complexity Konrad