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[83.9.31.184]) by smtp.gmail.com with ESMTPSA id s7-20020a056512214700b004b57bbaef87sm3643400lfr.224.2022.12.30.15.43.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Dec 2022 15:43:35 -0800 (PST) Message-ID: <036ce9f8-f24d-0255-e623-3612af09cd51@linaro.org> Date: Sat, 31 Dec 2022 00:43:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH 6/7] arm64: dts: qcom: sm8350: align PSCI domain names with DT schema Content-Language: en-US To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20221230160103.250996-1-krzysztof.kozlowski@linaro.org> <20221230160103.250996-6-krzysztof.kozlowski@linaro.org> From: Konrad Dybcio In-Reply-To: <20221230160103.250996-6-krzysztof.kozlowski@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 30.12.2022 17:01, Krzysztof Kozlowski wrote: > Bindings expect power domains to follow generic naming pattern: > > sm8350-hdk.dtb: psci: 'cpu-cluster0', 'cpu0', 'cpu1', 'cpu2', 'cpu3', 'cpu4', 'cpu5', 'cpu6', > 'cpu7' do not match any of the regexes: '^power-domain-', 'pinctrl-[0-9]+' > > Signed-off-by: Krzysztof Kozlowski > --- Reviewed-by: Konrad Dybcio Konrad > arch/arm64/boot/dts/qcom/sm8350.dtsi | 18 +++++++++--------- > 1 file changed, 9 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi > index a7da48b7e788..743ca0c80ac3 100644 > --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi > @@ -297,55 +297,55 @@ psci { > compatible = "arm,psci-1.0"; > method = "smc"; > > - CPU_PD0: cpu0 { > + CPU_PD0: power-domain-cpu0 { > #power-domain-cells = <0>; > power-domains = <&CLUSTER_PD>; > domain-idle-states = <&LITTLE_CPU_SLEEP_0>; > }; > > - CPU_PD1: cpu1 { > + CPU_PD1: power-domain-cpu1 { > #power-domain-cells = <0>; > power-domains = <&CLUSTER_PD>; > domain-idle-states = <&LITTLE_CPU_SLEEP_0>; > }; > > - CPU_PD2: cpu2 { > + CPU_PD2: power-domain-cpu2 { > #power-domain-cells = <0>; > power-domains = <&CLUSTER_PD>; > domain-idle-states = <&LITTLE_CPU_SLEEP_0>; > }; > > - CPU_PD3: cpu3 { > + CPU_PD3: power-domain-cpu3 { > #power-domain-cells = <0>; > power-domains = <&CLUSTER_PD>; > domain-idle-states = <&LITTLE_CPU_SLEEP_0>; > }; > > - CPU_PD4: cpu4 { > + CPU_PD4: power-domain-cpu4 { > #power-domain-cells = <0>; > power-domains = <&CLUSTER_PD>; > domain-idle-states = <&BIG_CPU_SLEEP_0>; > }; > > - CPU_PD5: cpu5 { > + CPU_PD5: power-domain-cpu5 { > #power-domain-cells = <0>; > power-domains = <&CLUSTER_PD>; > domain-idle-states = <&BIG_CPU_SLEEP_0>; > }; > > - CPU_PD6: cpu6 { > + CPU_PD6: power-domain-cpu6 { > #power-domain-cells = <0>; > power-domains = <&CLUSTER_PD>; > domain-idle-states = <&BIG_CPU_SLEEP_0>; > }; > > - CPU_PD7: cpu7 { > + CPU_PD7: power-domain-cpu7 { > #power-domain-cells = <0>; > power-domains = <&CLUSTER_PD>; > domain-idle-states = <&BIG_CPU_SLEEP_0>; > }; > > - CLUSTER_PD: cpu-cluster0 { > + CLUSTER_PD: power-domain-cpu-cluster0 { > #power-domain-cells = <0>; > domain-idle-states = <&CLUSTER_SLEEP_0>; > };