Re: [PATCH 3/4] clk: qcom: Add lpass audio clock controller driver for Glymur

[Taniya Das <taniya.das@oss.qualcomm.com>]

On 9/23/2026 12:14 AM, Srinivas Kandagatla wrote:
> Add support for the lpass audio clock controller found on Glymur based
> devices. This would allow lpass peripheral loader drivers to control the
> clocks and bring the subsystems out of reset.
> 
> Currently this patch only supports resets as the Q6DSP is in control of
> LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg
> channel.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
> ---
>  drivers/clk/qcom/Kconfig          | 11 +++++
>  drivers/clk/qcom/Makefile         |  1 +
>  drivers/clk/qcom/lpasscc-glymur.c | 70 +++++++++++++++++++++++++++++++
>  3 files changed, 82 insertions(+)
>  create mode 100644 drivers/clk/qcom/lpasscc-glymur.c
> 
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index b3ffe1dced01..1e571c237fc1 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -1253,6 +1253,17 @@ config SC_LPASSCC_8280XP
>  	  Say Y if you want to use the LPASS branch clocks of the LPASS clock
>  	  controller to reset the LPASS subsystem.
>  
> +config SC_LPASSCC_GLYMUR
> +	tristate "GLYMUR Low Power Audio Subsystem (LPASS) Clock Controller"
> +	depends on ARM64 || COMPILE_TEST
> +	default m if ARCH_QCOM
> +	help
> +	  Support for the LPASS clock controller on Glymur devices.
> +	  Say Y if you want to use the LPASS branch clocks of the LPASS clock
> +	  controller to reset the LPASS subsystem.  Required for the LPASS
> +	  audio macros and the SoundWire compute-mode controller to leave
> +	  reset on Glymur.
> +
>  config SC_LPASS_CORECC_7180
>  	tristate "SC7180 LPASS Core Clock Controller"
>  	depends on ARM64 || COMPILE_TEST
> diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
> index a6c676f68b79..c8348218b6b8 100644
> --- a/drivers/clk/qcom/Makefile
> +++ b/drivers/clk/qcom/Makefile
> @@ -149,6 +149,7 @@ obj-$(CONFIG_SC_LPASSCC_7280) += lpasscc-sc7280.o
>  obj-$(CONFIG_SC_LPASSCC_8280XP) += lpasscc-sc8280xp.o
>  obj-$(CONFIG_SC_LPASS_CORECC_7180) += lpasscorecc-sc7180.o
>  obj-$(CONFIG_SC_LPASS_CORECC_7280) += lpasscorecc-sc7280.o lpassaudiocc-sc7280.o
> +obj-$(CONFIG_SC_LPASSCC_GLYMUR) += lpasscc-glymur.o
>  obj-$(CONFIG_SC_VIDEOCC_7180) += videocc-sc7180.o
>  obj-$(CONFIG_SC_VIDEOCC_7280) += videocc-sc7280.o
>  obj-$(CONFIG_SDM_CAMCC_845) += camcc-sdm845.o
> diff --git a/drivers/clk/qcom/lpasscc-glymur.c b/drivers/clk/qcom/lpasscc-glymur.c
> new file mode 100644
> index 000000000000..97fc099983b6
> --- /dev/null
> +++ b/drivers/clk/qcom/lpasscc-glymur.c
> @@ -0,0 +1,70 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/err.h>
> +#include <linux/kernel.h>
> +#include <linux/mod_devicetable.h>

Please remove.

> +#include <linux/module.h>
> +#include <linux/of.h>

please remove.

> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +#include <dt-bindings/clock/qcom,glymur-lpasscc.h>
> +
> +#include "common.h"
> +#include "reset.h"
> +
> +static const struct qcom_reset_map lpass_audiocc_glymur_resets[] = {
> +	[LPASS_AUDIO_SWR_RX_CGCR] = { 0xA0, 1 },
> +	[LPASS_AUDIO_SWR_WSA1_CGCR] = { 0xB0, 1 },
> +	[LPASS_AUDIO_SWR_WSA2_CGCR] = { 0xD8, 1 },
> +	[LPASS_AUDIO_SWR_WSA3_CGCR] = { 0x300C, 1 },
> +	[LPASS_AUDIO_SWR_WSA4_CGCR] = { 0x301C, 1 },

lower case please.

> +};
> +
> +static const struct regmap_config lpass_audiocc_glymur_regmap_config = {
> +	.reg_bits = 32,
> +	.reg_stride = 4,
> +	.val_bits = 32,
> +	.name = "lpass-audio-csr",
> +	.max_register = 0x1000,
> +};
> +
> +static const struct qcom_cc_desc lpass_audiocc_glymur_reset_desc = {
> +	.config = &lpass_audiocc_glymur_regmap_config,
> +	.resets = lpass_audiocc_glymur_resets,
> +	.num_resets = ARRAY_SIZE(lpass_audiocc_glymur_resets),
> +};
> +
> +static const struct of_device_id lpasscc_glymur_match_table[] = {
> +	{
> +		.compatible = "qcom,glymur-lpassaudiocc",
> +		.data = &lpass_audiocc_glymur_reset_desc,
> +	},
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(of, lpasscc_glymur_match_table);
> +
> +static int lpasscc_glymur_probe(struct platform_device *pdev)
> +{
> +	const struct qcom_cc_desc *desc = of_device_get_match_data(&pdev->dev);
> +
> +	return qcom_cc_probe_by_index(pdev, 0, desc);
> +}
> +
> +static struct platform_driver lpasscc_glymur_driver = {
> +	.probe = lpasscc_glymur_probe,
> +	.driver = {
> +		.name = "lpasscc-glymur",
> +		.of_match_table = lpasscc_glymur_match_table,
> +	},
> +};
> +
> +module_platform_driver(lpasscc_glymur_driver);
> +
> +MODULE_AUTHOR("Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>");
> +MODULE_DESCRIPTION("QTI LPASSCC Glymur Driver");
> +MODULE_LICENSE("GPL");

-- 
Thanks,
Taniya Das