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Thu, 11 Feb 2021 10:17:15 +0000 Subject: Re: [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin To: Claudius Heine , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , open list Cc: Marek Vasut References: <20210211095413.1043102-1-ch@denx.de> From: Frieder Schrempf Message-ID: <03ac353d-e7a1-5235-a787-21014d0c7607@kontron.de> Date: Thu, 11 Feb 2021 11:17:13 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 In-Reply-To: <20210211095413.1043102-1-ch@denx.de> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [109.250.136.36] X-ClientProxiedBy: AM0PR03CA0025.eurprd03.prod.outlook.com (2603:10a6:208:14::38) To AM0PR10MB2963.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:157::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [192.168.10.27] (109.250.136.36) by AM0PR03CA0025.eurprd03.prod.outlook.com (2603:10a6:208:14::38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3846.25 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?utf-8?B?VFVCNlRLTHgzQzZpOTRwZ2tmdFkxZVMxTVhteW9hYndkRnZDaHdDQy9LYVlN?= =?utf-8?B?cmxGODAwUHZzOW1YNG0weXN2d1VkZFdhOUJQbloxMlNEd1UzY1dHTmNpTlBm?= =?utf-8?B?THpHU2oyeEdBV1RwbTJVMnE2NlBFbWRJV2pXZUxqWFpQWXBnbmZ2T2c5WXZS?= =?utf-8?B?amVqS09WajMwMnUyR1daL255RURtdUZmUWRwcmdCcUhXMVpuM3JPYWdsdktk?= =?utf-8?B?bFhCZFV2UVJUWEdpYzZIL3ZkUTBPd2JhdmxOYWpaU20wejNTbTFmM0o5emdh?= =?utf-8?B?QXlyTVBIVmJkNVRhUXJ2VG11UkdDTFByZU8vVjhUSnRGS2tZUkl2MFB3WXMw?= =?utf-8?B?V0JQUFlkOWxtUUkraWxGRllkREw0bTdCdS8rOGxNcUEwNDF5WUZNNGxYdDlt?= =?utf-8?B?ck9KUTgyQXg2TWhsd0dDTUlYd3c3bUx5dkZTTzY0ZDh3Y2ozRTFYcDZ1N3Jm?= =?utf-8?B?aHd4S292UGVqeGlSRk9qZ1RxVFljdlJndXE5WE1oYlNqUGtHRVRVQU9oc3hS?= =?utf-8?B?NmRKNzJQLzgwQTk5VDd6OVpJNDV6QmZpTHBYR2xDbHUwbmxIRUFJeW95VDg1?= =?utf-8?B?VWZhV0JMeDE0RlFlaFNNcVdlYTNyUVg0a3RocFVVMkh4NlVIVXRBeThQU1Vk?= =?utf-8?B?ZnNpNmxXZmtuWUFjZXdBNG9LTWg3cXhqaml5RWdzV0l4cE9Eclc1OEl0S2kz?= =?utf-8?B?QXphR1RrNUJEdjNmblllVUZiSDhlMnJXQzA2bkxCMlhibjFQVWZ1ZUFicmRw?= =?utf-8?B?MFhnekowc2t2NjJGYk9sbVpIcTRDTm5QRlpZWFFQVTIzUXVqUDNDM1lnY3Bv?= =?utf-8?B?SXJCaVJRNWtQUStBcjNlYnBRenBPbi81enc5b0tjd25BT0Q1dENzTy9KVXZI?= =?utf-8?B?Z05HeWpXejFkcklucGFtYTJUNGcwWXRuRDd5ekNNRTdDYkRMTzVNMmg0NUZ5?= =?utf-8?B?cHVKL2E5QnBFY1dPNkRyeGd3eG9XRXhMS1ozWjFJeDVBZjgyVGg0SjdYcTdX?= =?utf-8?B?SEtzM01YdHFBNDVySnBBSlJwMGZtN3E0RkdwSnZhbDBBWXYzWmUvcE9GR2hX?= =?utf-8?B?eXVCK0doRVVjYkJBUzloZ2cyZTliak9XbjBGM0wwWUVJTVo2SE12TXp3bTRs?= =?utf-8?B?TEhicFh5dHFmMFFBWUxQelhITmNIb0RDYTA2KzRJLzJPcXIxM3VOeGM1d3FB?= =?utf-8?B?b2ZvN21SaktaaTNzZ0c5OHBUNDVFMmkwSnU2QUppZmFFQ2VNZnFYWkFzUWRM?= =?utf-8?B?M0NkNnprZUZ3cVZpa3djZ3lZd01iUFVJVmN0VEtCbXpaK2Y4K25qNmxTMlpp?= =?utf-8?B?MW1RUFBWdWhCRDNJZE1FYitodmt5aXZhaHFFMHdYRFBrQU40cmlza2Y5NEJ3?= =?utf-8?B?dk4xeXZyWUhMSWQ4NHczRGFFWDhvRlBJYnVaTGp0L1dqaCsybW1JMmMvSWFV?= =?utf-8?B?UkFZME1LVEdLd2hIRjg0eVdQNU9Zcmx1TzFLU3hRL292aGw4b204R0hZQmQ1?= =?utf-8?B?TS8wODN1WFVOSTZnTDVRRThiYmIzVXU2VVRLWWtyR05RMHErTitWbTNLS3B4?= =?utf-8?B?c3VHNE9Pd0ZSOFY4KzFKZzl3UmVwUUZzbEdLYXIwNFZETGZ6aVN1TU9BM21l?= =?utf-8?B?TFVZZGdnRHVLeHBxRHRMamdvQklhaDF2SEpZMmNDblM0bS85MGNDS045aUYy?= =?utf-8?B?SmNOWWxmc1lIMlV1TXhIb0tmcVJkRVhja0d1cXExQjU4MWFyRmkwSjh3MTd4?= =?utf-8?Q?jWe9UDlUXAVbcQ2S6FckGSwc+VeYOP7SYvOhS/8?= X-OriginatorOrg: kontron.de X-MS-Exchange-CrossTenant-Network-Message-Id: af5e7023-01da-4b35-8077-08d8ce76340f X-MS-Exchange-CrossTenant-AuthSource: AM0PR10MB2963.EURPRD10.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Feb 2021 10:17:15.0807 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8c9d3c97-3fd9-41c8-a2b1-646f3942daf1 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: AT1n+qPcR79lJ7QbTyPaY8GTZg5C4pBu6Iw7lC5fv/3dJkep9eDpP/RlG/hLnQABf7EEjyQRQ5HNCuM3wSRLtSvBEDrXp28MlwbjjOKOZd4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR10MB4083 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11.02.21 10:54, Claudius Heine wrote: > There is a 0 missing in the pad register offset. This patch adds it. > > Signed-off-by: Claudius Heine I think this should rather be prefixed by "arm64: dts: imx8mm:" as this is no change in the pinctrl driver, but only in the devicetree. And I guess this deserves a "Fixes" and "Cc: stable" tag, so: Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm") Cc: stable@vger.kernel.org Reviewed-by: Frieder Schrempf > --- > arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h > index 5ccc4cc91959d..a003e6af33533 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h > +++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h > @@ -124,7 +124,7 @@ > #define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x0A4 0x30C 0x000 0x0 0x0 > #define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x0A4 0x30C 0x000 0x5 0x0 > #define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0A8 0x310 0x000 0x0 0x0 > -#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x31 0x000 0x5 0x0 > +#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x310 0x000 0x5 0x0 > #define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0AC 0x314 0x000 0x0 0x0 > #define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x0AC 0x314 0x000 0x5 0x0 > #define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0B0 0x318 0x000 0x0 0x0 >