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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc28c4ea2casm170282766b.53.2026.05.05.03.43.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 05 May 2026 03:43:09 -0700 (PDT) Message-ID: <03cd1bbc-6d8e-4819-8cb5-a46a7d58b1b9@oss.qualcomm.com> Date: Tue, 5 May 2026 12:43:07 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] pinctrl: qcom: Unconditionally mark gpio as wakeup enable To: Sneh Mankad , Bjorn Andersson , Linus Walleij , Neil Armstrong , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org References: <20260430-enable_wakeup_capable_gpios-v1-1-5de39bf06094@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260430-enable_wakeup_capable_gpios-v1-1-5de39bf06094@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: qa7xz-oCzWoKr2XAfBGqFi4yXPDT_XXT X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA1MDEwMCBTYWx0ZWRfX4VKlORxOPbmB aVzNEF7z3ZihvO1rS//PsSUkcWY6915rQVjs9yfcHo9rKRrZGl/6xFgGQPqrpNtYp+Y4Bu/E0G6 /qQlwTrvL7IHVFyOWqJ15iZD20Sts9cr7Pfvc1jNE06Y9d+iNx66gsi+AeyLVV7kYZjJf1kvP9u 2R+6ou+5ZGA67OSj+rcV/z2zoO2JPV/DuqCl1yCAiO5e4iGB2WBlGpWfyjm2Sw6S/+7zBpALdql yK4jEpq12OpSBSxpzLDg3a2aUyITz1vqlhEUQSD/Tp9EyMwE1eHGniMpFg8rVciCarxPTYnty6V s3Sgmu+ZbrV+o3Bl58UYKT/ha5pHYNpgkir+SuGrCS1Jwvwrqsa8ILpu3mc+qqegSCucAjjOoBF 1PZqeHqAYJToty2L1aZ48JlQfCu9Un7PuZhvwg4azy7qrMfwNWTb9gWqCCxeWlmhhpZNjHNx/Dv t6h+DtW4a/BGk4ABW0Q== X-Authority-Analysis: v=2.4 cv=K+AS2SWI c=1 sm=1 tr=0 ts=69f9c9bf cx=c_pps a=R6oCqFB+Yf/t2GF8e0/dFg==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=LNx3DaDb6K_AIgL2L64A:9 a=QEXdDO2ut3YA:10 a=TD8TdBvy0hsOASGTdmB-:22 X-Proofpoint-GUID: qa7xz-oCzWoKr2XAfBGqFi4yXPDT_XXT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-05_02,2026-04-30_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 spamscore=0 adultscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605050100 On 4/30/26 7:54 AM, Sneh Mankad wrote: > The wakeup enable bit needs to be set irrespective of the SoC using PDC or > MPM as wakeup capable irqchip to allow the GPIO interrupts to be forwarded > to parent irqchip. > > This is set only for PDC irqchip using additional check skip_wake_irqs > making it impossible for MPM irqchip to detect the GPIO interrupt during > SoC low power mode since for MPM irqchip the skip_wake_irqs is always > false. This describes the impact, but not the reason why this happens. Please expand on that. Konrad