Re: [PATCH 3/3] regcache: flat: Add valid bit to this cache type

["Andrew F. Davis" <afd@ti.com>]

On 01/08/2018 10:36 AM, Mark Brown wrote:
> On Mon, Jan 08, 2018 at 10:25:28AM -0600, Andrew F. Davis wrote:
> 
>> I can understand the need for a fast cache type, but without this change
>> the implementation is simply wrong IMHO. Reading from a register that
>> has not been read/written to should not just assume the default value is
>> 0, it should first read and load the real initial value into the cache,
>> just like other cache types do.
> 
> Users are supposed to ensure that the cache is fully initialized either
> by supplying defaults or writing to all the registers.  Adding reads is
> problematic since we'd suddenly start reading from hardware which might
> not like it.
> 

This does not appear documented anywhere, and is counter to the basic
definition of how a cache should work.

If the hardware does not like reads then the registers should be marked
as not readable in their regmap config, if they don't do this then they
need fixed, not the cache scheme.

For my device, I cannot know beforehand what is in some registers as
they change from device to device, and if I do a read to find out it
will *always* return 0 as this cache type is broken. Other types work as
expected, fetching the real initial value. My only alternative is to
turn off cache, read, turn on cache, write, then continue as before..

>> Also, it looks like this cache type is used mostly in I2C devices
>> (outside of sound/soc/, where in there, like you said MMIO devices are
>> more common).
> 
> Sounds like a good thing to do an audit and contribute fixes for...
> 

My guess is most assumed what I did and they only got lucky as all their
device registers were default 0 anyway. In which case the results before
and after this patch will be the same.