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[72.194.116.95]) by smtp.gmail.com with ESMTPSA id j3-20020ad453a3000000b005dd8b9345edsm4145230qvv.133.2023.04.05.05.42.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 05 Apr 2023 05:42:58 -0700 (PDT) Message-ID: <03ed8642-e521-f079-05b8-de9ffa97237a@gmail.com> Date: Wed, 5 Apr 2023 05:42:53 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH 00/12] Rework PHY reset handling Content-Language: en-US To: Marco Felsch , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Broadcom internal kernel review list , Richard Cochran , Radu Pirea , Shyam Sundar S K , Yisen Zhuang , Salil Mehta , Jassi Brar , Ilias Apalodimas , Iyappan Subramanian , Keyur Chudgar , Quan Nguyen , "Rafael J. Wysocki" , Len Brown , Rob Herring , Frank Rowand Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de References: <20230405-net-next-topic-net-phy-reset-v1-0-7e5329f08002@pengutronix.de> From: Florian Fainelli In-Reply-To: <20230405-net-next-topic-net-phy-reset-v1-0-7e5329f08002@pengutronix.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marco, On 4/5/2023 2:26 AM, Marco Felsch wrote: > The current phy reset handling is broken in a way that it needs > pre-running firmware to setup the phy initially. Since the very first > step is to readout the PHYID1/2 registers before doing anything else. > > The whole dection logic will fall apart if the pre-running firmware > don't setup the phy accordingly or the kernel boot resets GPIOs states > or disables clocks. In such cases the PHYID1/2 read access will fail and > so the whole detection will fail. PHY reset is a bit too broad and should need some clarifications between: - external reset to the PHY whereby a hardware pin on the PHY IC may be used - internal reset to the PHY whereby we call into the PHY driver soft_reset function to have the PHY software reset itself You are changing the way the former happens, not the latter, at least not changing the latter intentionally if at all. This is important because your cover letter will be in the merge commit in the networking tree. Will do a more thorough review on a patch by patch basis. Thanks. > > I fixed this via this series, the fix will include a new kernel API > called phy_device_atomic_register() which will do all necessary things > and return a 'struct phy_device' on success. So setting up a phy and the > phy state machine is more convenient. > > I tested the series on a i.MX8MP-EVK and a custom board which have a > TJA1102 dual-port ethernet phy. Other testers are welcome :) > > Regards, > Marco > > Signed-off-by: Marco Felsch > --- > Marco Felsch (12): > net: phy: refactor phy_device_create function > net: phy: refactor get_phy_device function > net: phy: add phy_device_set_miits helper > net: phy: unify get_phy_device and phy_device_create parameter list > net: phy: add phy_id_broken support > net: phy: add phy_device_atomic_register helper > net: mdio: make use of phy_device_atomic_register helper > net: phy: add possibility to specify mdio device parent > net: phy: nxp-tja11xx: make use of phy_device_atomic_register() > of: mdio: remove now unused of_mdiobus_phy_device_register() > net: mdiobus: remove now unused fwnode helpers > net: phy: add default gpio assert/deassert delay > > Documentation/firmware-guide/acpi/dsd/phy.rst | 2 +- > MAINTAINERS | 1 - > drivers/net/ethernet/adi/adin1110.c | 6 +- > drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 8 +- > drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c | 11 +- > drivers/net/ethernet/socionext/netsec.c | 7 +- > drivers/net/mdio/Kconfig | 7 - > drivers/net/mdio/Makefile | 1 - > drivers/net/mdio/acpi_mdio.c | 20 +- > drivers/net/mdio/fwnode_mdio.c | 183 ------------ > drivers/net/mdio/mdio-xgene.c | 6 +- > drivers/net/mdio/of_mdio.c | 23 +- > drivers/net/phy/bcm-phy-ptp.c | 2 +- > drivers/net/phy/dp83640.c | 2 +- > drivers/net/phy/fixed_phy.c | 6 +- > drivers/net/phy/mdio_bus.c | 7 +- > drivers/net/phy/micrel.c | 2 +- > drivers/net/phy/mscc/mscc_ptp.c | 2 +- > drivers/net/phy/nxp-c45-tja11xx.c | 2 +- > drivers/net/phy/nxp-tja11xx.c | 47 ++- > drivers/net/phy/phy_device.c | 348 +++++++++++++++++++--- > drivers/net/phy/sfp.c | 7 +- > include/linux/fwnode_mdio.h | 35 --- > include/linux/of_mdio.h | 8 - > include/linux/phy.h | 46 ++- > 25 files changed, 442 insertions(+), 347 deletions(-) > --- > base-commit: 054fbf7ff8143d35ca7d3bb5414bb44ee1574194 > change-id: 20230405-net-next-topic-net-phy-reset-4f79ff7df4a0 > > Best regards, -- Florian