From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA1D2C2BA83 for ; Wed, 12 Feb 2020 16:03:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8BF372082F for ; Wed, 12 Feb 2020 16:03:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728624AbgBLQDy (ORCPT ); Wed, 12 Feb 2020 11:03:54 -0500 Received: from mga02.intel.com ([134.134.136.20]:17620 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726728AbgBLQDy (ORCPT ); Wed, 12 Feb 2020 11:03:54 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Feb 2020 08:03:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,433,1574150400"; d="scan'208";a="313442360" Received: from gmoralez-mobl.amr.corp.intel.com (HELO [10.252.135.232]) ([10.252.135.232]) by orsmga001.jf.intel.com with ESMTP; 12 Feb 2020 08:03:41 -0800 Subject: Re: [alsa-devel] [PATCH] ASoC: da7219: check SRM lock in trigger callback To: Adam Thomson , "Sridharan, Ranjani" Cc: "alsa-devel@alsa-project.org" , Support Opensource , Takashi Iwai , Liam Girdwood , "linux-kernel@vger.kernel.org" , "Chiang, Mac" , Mark Brown , Ranjani Sridharan , "Lu, Brent" , "cychiang@google.com" References: <1581322611-25695-1-git-send-email-brent.lu@intel.com> <855c88fb-4438-aefb-ac9b-a9a5a2dc8caa@linux.intel.com> <2eeca7fe-aec9-c680-5d61-930de18b952b@linux.intel.com> From: Pierre-Louis Bossart Message-ID: <043c8384-6ce2-c78e-f52c-6a37a4bab3a0@linux.intel.com> Date: Wed, 12 Feb 2020 09:48:24 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >> Thanks Ranjani. That information closes the door on the idea of playing >> with the trigger order suggested earlier in the thread, so my guess is >> that we really need to expose the MCLK/BCLK with the clk API and turn >> them on/off from the machine driver as needed. I hope is that we don't >> need the FSYNC as well, that would be rather painful to implement. > > Am not going to make myself popular here. It's MCLK and FSYNC (or WCLK as it's > termed for our device) that is required for SRM to lock in the PLL. > > So far I've not found a way in the codec driver to be able to get around this. > I spent a very long time with Sathya in the early days (Apollo Lake) looking at > options but nothing would fit which is why I have the solution that's in place > right now. We could probably reduce the number of rechecks before timeout in the > driver but that's really just papering over the crack and there's still the > possibility of noise later when SRM finally does lock. Sorry, you lost me at "the solution that's in place right now". There is nothing in the bxt_da7219_max98357a.c code that deals with clocks or defines a trigger order?