From: Marek Vasut <marek.vasut@mailbox.org>
To: Luca Ceresoli <luca.ceresoli@bootlin.com>,
Andrzej Hajda <andrzej.hajda@intel.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Robert Foss <rfoss@kernel.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Frieder Schrempf <frieder.schrempf@kontron.de>,
Linus Walleij <linusw@kernel.org>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
Subject: Re: [PATCH 1/3] drm/bridge: ti-sn65dsi83: fix CHA_DSI_CLK_RANGE rounding
Date: Fri, 27 Feb 2026 11:39:02 +0100 [thread overview]
Message-ID: <044a03ee-3c78-4915-ae0b-3cf5045df374@mailbox.org> (raw)
In-Reply-To: <20260226-ti-sn65dsi83-dual-lvds-fixes-and-test-pattern-v1-1-2e15f5a9a6a0@bootlin.com>
On 2/26/26 5:16 PM, Luca Ceresoli wrote:
> The DSI frequency must be in the range:
>
> (CHA_DSI_CLK_RANGE * 5 MHz) <= DSI freq < ((CHA_DSI_CLK_RANGE + 1) * 5 MHz)
>
> So the register value shouldpoint to the lower range value, but
should point (missing space)
> DIV_ROUND_UP() rounds the division to the higher range value, resulting in
> an excess of 1 (unless the frequency is an exact multiple of 5 MHz).
>
> For example for a 437100000 MHz clock CHA_DSI_CLK_RANGE should be 87 (0x57):
>
> (87 * 5 = 435) <= 437.1 < (88 * 5 = 440)
>
> but current code returns 88 (0x58).
>
> Fix the computation by removing the DIV_ROUND_UP().
>
> Fixes: ceb515ba29ba ("drm/bridge: ti-sn65dsi83: Add TI SN65DSI83 and SN65DSI84 driver")
> Cc: stable@vger.kernel.org
> Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Thanks !
next prev parent reply other threads:[~2026-02-27 10:39 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-26 16:16 [PATCH 0/3] drm/bridge: ti-sn65dsi83: two fixes + add test pattern Luca Ceresoli
2026-02-26 16:16 ` [PATCH 1/3] drm/bridge: ti-sn65dsi83: fix CHA_DSI_CLK_RANGE rounding Luca Ceresoli
2026-02-27 10:39 ` Marek Vasut [this message]
2026-04-08 15:32 ` Louis Chauvet
2026-02-26 16:16 ` [PATCH 2/3] drm/bridge: ti-sn65dsi83: halve horizontal syncs for dual LVDS output Luca Ceresoli
2026-02-27 10:41 ` Marek Vasut
2026-04-08 15:34 ` Louis Chauvet
2026-02-26 16:16 ` [PATCH 3/3] drm/bridge: ti-sn65dsi83: add test pattern generation support Luca Ceresoli
2026-02-27 10:41 ` Marek Vasut
2026-02-27 10:57 ` Maxime Ripard
2026-02-27 12:58 ` Luca Ceresoli
2026-02-27 12:57 ` Luca Ceresoli
2026-04-08 15:40 ` Louis Chauvet
2026-04-08 16:13 ` Luca Ceresoli
2026-03-09 22:11 ` (subset) [PATCH 0/3] drm/bridge: ti-sn65dsi83: two fixes + add test pattern Luca Ceresoli
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