Re: [PATCH] KVM: x86/mmu: Rephrase comment about synthetic PFERR flags in #PF handler

[Xiaoyao Li <xiaoyao.li@intel.com>]

On 6/8/2024 8:11 AM, Sean Christopherson wrote:
> Reword the BUILD_BUG_ON() comment in the legacy #PF handler to explicitly
> describe how asserting that synthetic PFERR flags are limited to bits 31:0
> protects KVM against inadvertently passing a synthetic flag to the common
> page fault handler.
> 
> No functional change intended.
> 
> Suggested-by: Xiaoyao Li <xiaoyao.li@intel.com>
> Signed-off-by: Sean Christopherson <seanjc@google.com>

Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>

> ---
>   arch/x86/kvm/mmu/mmu.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
> index 8d7115230739..2421d971ce1b 100644
> --- a/arch/x86/kvm/mmu/mmu.c
> +++ b/arch/x86/kvm/mmu/mmu.c
> @@ -4599,7 +4599,10 @@ int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code,
>   	if (WARN_ON_ONCE(error_code >> 32))
>   		error_code = lower_32_bits(error_code);
>   
> -	/* Ensure the above sanity check also covers KVM-defined flags. */
> +	/*
> +	 * Restrict KVM-defined flags to bits 63:32 so that it's impossible for
> +	 * them to conflict with #PF error codes, which are limited to 32 bits.
> +	 */
>   	BUILD_BUG_ON(lower_32_bits(PFERR_SYNTHETIC_MASK));
>   
>   	vcpu->arch.l1tf_flush_l1d = true;
> 
> base-commit: b9adc10edd4e14e66db4f7289a88fdbfa45ae7a8