From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ed1-f54.google.com (mail-ed1-f54.google.com [209.85.208.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 133AC199385 for ; Sun, 7 Jun 2026 01:03:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.54 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780794205; cv=none; b=H8RRyhiGCigtySemwvc4sfLAF/SRMSiNYaEikHYHRLpq6anLCyf0UjAp0UbEtwcmTgjmdkHyln773lwHrIustRQjhiayyVs1tSc/8ECTI0EiBGCUFIk3NN4IaBzuBz5ki4Rrk9F/kgT3FoEkvpPccbUL/3rFwkK6SRZ0tzdOMFI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780794205; c=relaxed/simple; bh=V7tezCKTEwZpa11y/H0dMbg03qX0QXGP1XKis3C+aNw=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=P3fF+xl+3s3Hltcj4yckYxLwI+bxuki8iBhtla+yCZQrugnuQpS2HAufzqAFckiHZ+7CP8D9aeNF3HKUXixt12Pfv38K80h4QkfMxFK1Cko6E+odN0favAwN4ZKZKhjavYPvEGrntgeasKhZS1xswJBkqUXW4uzpdpUzn1G+yFM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pardini.net; spf=pass smtp.mailfrom=pardini.net; dkim=pass (2048-bit key) header.d=pardini.net header.i=@pardini.net header.b=JfGqC/ws; arc=none smtp.client-ip=209.85.208.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pardini.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pardini.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pardini.net header.i=@pardini.net header.b="JfGqC/ws" Received: by mail-ed1-f54.google.com with SMTP id 4fb4d7f45d1cf-68d234218bcso6377395a12.2 for ; Sat, 06 Jun 2026 18:03:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pardini.net; s=google; t=1780794202; x=1781399002; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=HqAMDji/Y/ZfDPdozsCR+NdaIZJxhg+V9OuE8Iuwqx0=; b=JfGqC/wsx5Hqql7fs+BsCvQYlBZMhQ0dLHiNBps2c+/LrK92g8nsLvEO0IHFPMg3dl 59rqd5zwKfJynEIOqQFO87Whd81MdW4B1AqcNrw1zTcQxCX0ryjokLydJ2NkQGSN/D9w +0bcYW8ZP87M6mwGVPDH33S/MLvXjWIlKDlUVluH00EihswRPr12/X/S2403LNPK8cXl F59owFAS38NlUIWp88lfczEned9edLNMan3RYy6IrHWWLiCsN4lE5a9ytuqITbjgxMnE 6qPM+E9sZbcRJHc2qTFtZxF+LIfQMdGPORmp4lT6Szikhr50To75B56qH/Hsa4YYu7Sh 81SA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780794202; x=1781399002; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=HqAMDji/Y/ZfDPdozsCR+NdaIZJxhg+V9OuE8Iuwqx0=; b=cAvmhYFjp97vi3HuGpYiGdRKSdpxb65TkhpICLteGtwbMpoYv5z7WrJxttgVziSmAs lr0f9vEk3QuXkos5kyEIJUKZNxTixBAKm3HG4bf06u0fyxazDwWeQ7+AvRlgjvmMMGok Dbr4W/bDXzka2/uUXauslOVwoSW98t9eGE5FULEfYi5yHTCjjjhU0R/dHT9nMgBiRaK5 ZSGcuVjBmB2v+PcdL8EGSGhSFYANLNw9oiyiRNI7/BoN5yiOBUDyW+N7oesS2U3kqAKW bAN9yiFMUAjMuk4ss6ilqPAPhFP1fk+jile7WlKy+VhRz1s8UfZkQ3JFYZ6pTuJgB2o9 8usg== X-Forwarded-Encrypted: i=1; AFNElJ9msPMbpnqCTXw52TQjgNn6BcwqEVUW/gw1MtGSMLZoNRUP3lRaWi0AUxfP1IknGwHr5mffB1uvRdwagHI=@vger.kernel.org X-Gm-Message-State: AOJu0YxD0thxerfu5UQu+/b+TF67mz7JcuHAplqmKvX79dOhho+9KHV3 /zvyG69CLp0q1MLAIolmxM9l7IcT3Ee8Z4hr5ccb73F5Ha81DKixxKfVT84HjuMaig== X-Gm-Gg: Acq92OEs5DVmLBkHvTH35lFuMXk/dihZ2oB+7cK6ilkzmT/94GsqH+JaNlWYEkQL2WG i7CjJoiCgYeLh4CsrVoyGyB2ohCly+7sE0wzeGW+MfabtU+MMvYlm4aPxB1pZW18bCwZU+wiMNq i+kQWb0j5PAQxIltk6AudxE3ITJ7wGmP2bsn3AP50ueQmMdT4Nbz8D+2l6L3Rypk7raIYPr45j6 PQvVuSwict2sXHAc+hNUhMxCK+Wje/uYHPh+ZGDJpdSiLeBE1jiwfMx3s/M709QnCcQdHTC/4LP dDv6mp8CC+1cavdvr2jrjIEYStz7jNyAuiOyg0Z0u3yJ9I8C3pQf8x70sp0UfDvIoyetwYZbnP+ JWeya8ZPZz2mFa8wW8bJKhfs7S51UuwCuhMJFvGTJ8v8xnOneqzP0mArYwsvC3DRY5VO2n1+ffH 1ec52jpb8OfIj/lx+DehlQZnsFG85QGhQJmVezXoGI/ofIs1YiUp8QHl1cfkHeQubv5UcPPZpf0 w9w6A2GA5tEqqUoi2hW9QPsFLMY5bTO9+xS3bBmulFJ5kUpR+e3JkJVs8TC7n3XUg+TS40MRxiM 7ePW X-Received: by 2002:a17:906:6a01:b0:bed:87c:b24e with SMTP id a640c23a62f3a-bf3721513damr453039466b.29.1780794201771; Sat, 06 Jun 2026 18:03:21 -0700 (PDT) Received: from ?IPV6:2a02:a466:4d7a:0:9569:75b0:b281:a338? (2a02-a466-4d7a-0-9569-75b0-b281-a338.fixed6.kpn.net. [2a02:a466:4d7a:0:9569:75b0:b281:a338]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bf054e0280asm654743666b.33.2026.06.06.18.03.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 06 Jun 2026 18:03:20 -0700 (PDT) Message-ID: <04ef65b1-e28f-42fd-b054-d1843205f67d@pardini.net> Date: Sun, 7 Jun 2026 03:03:19 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/3] dt-bindings: net: add Realtek r8169 family PCIe Ethernet To: Heiner Kallweit , nic_swsd@realtek.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Sebastian Reichel , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org References: <20260605-rk3588-dts-rtl-eth-describe-dt-alias-v3-0-8a8857b39daf@pardini.net> <20260605-rk3588-dts-rtl-eth-describe-dt-alias-v3-1-8a8857b39daf@pardini.net> <26da1dfa-3408-4654-9046-36ed6d57059c@pardini.net> <667f64e0-2b3e-41bf-9c97-3562696d3af7@gmail.com> Content-Language: en-US From: Ricardo Pardini In-Reply-To: <667f64e0-2b3e-41bf-9c97-3562696d3af7@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 06/06/2026 22:50, Heiner Kallweit wrote: > On 06.06.2026 07:03, Ricardo Pardini wrote: >> On 05/06/2026 17:48, Heiner Kallweit wrote: >>> On 05.06.2026 13:49, Ricardo Pardini via B4 Relay wrote: >>>> From: Ricardo Pardini >>>> >>>> Add a binding for fixed/soldered Realtek PCIe Ethernet controllers >>>> driven by the r8169 driver (RTL8125/8126/8127/8168 and variants). >>>> >>>> The "pciVVVV,DDDD" compatibles are the Open Firmware PCI Bus Binding >>>> spelling, auto-derived from PCI-SIG vendor/device IDs, but they still >>>> need a binding when used in a board DT - analogous to "usbVVVV,PPPP" >>>> compatibles documented in their own bindings (e.g. microchip,lan95xx) >>>> so board DTs attaching properties (fixed MAC, nvmem cell, ...) to >>>> these PCI function nodes can be validated. >>> >>> The of node seems to be created by of_pci_make_dev_node(). But this >>> function is called for bridges only in pci_bus_add_device(). >>> So where is the node created in your case? Did you test node creation? >> >> Seems to me of_pci_make_dev_node() is not at play here - that's the DT-synthesis path. For nodes already present in DT, the of_node is bound earlier, during pci_setup_device() -> pci_set_of_node() -> of_pci_find_child_device() via the 5-cell reg. >> > I see, thanks. If the matching is done based on the reg property, then I just wonder > if and where the compatible string is used. Or would the logic also work with a > random compatible string? Thanks, Heiner. It seems the compatible is not involved in the kernel runtime matching at all (and u-boot simply patches DT via the ethernetN alias). I guess DT-wise, specifying compatible (although not strictly required) makes sense since DT describes the hardware; "there's an RTL8125 at 0x410000" sounds better than "there's a PCIe device that needs a MAC address at 0x410000", and having the binding opens up usages of non-generic properties, although that would be future-looking. At this stage I've to ask the devicetree folks: should I simply drop the compatible from the DT patches (and the whole binding)? dtbs_check passes without it, and it also avoids the checkpatch.pl vendor-prefix-undocumented warning. There's precedent: at least on some Apple Silicon (2022, t600x-j375) and NVIDIA (2019, tegra210-p3450-0000). On Rockchip there's quite a few (10?) boards using the same RTL chip we might want to describe. > [...] >>> This list reflects just some of the PCI id's handled by r8169. >>> Any specific reason for this exact selection? >> I went for "chips likely to be soldered down on an SBC", but that was indeed speculative. >> >> I guess I should trim to pci10ec,8125, which is all this series describes? (further IDs can be added by the patches that introduce boards using them) >> > Yes, I'd prefer this approach. Considering that RTL8168 has been supported for > about 20yrs now, your use case seems to be exotic. Otherwise I would have > such a patch much earlier. The Tegra Jetson Nano has an RTL8111 described in DT for this exact use case (without compatible) for about 7 years now -- I just couldn't find it until now. I'll wait for people to chime in, and later send a v4 either dropping the binding, or trimming it to only the 8125. Sashiko seems to have nice suggestions [1] on the YAML too, in case we decide to keep the binding. -- Regards, Ricardo [1] https://sashiko.dev/#/patchset/20260605-rk3588-dts-rtl-eth-describe-dt-alias-v3-0-8a8857b39daf%40pardini.net