From: "Mukunda,Vijendar" <vijendar.mukunda@amd.com>
To: Mark Brown <broonie@kernel.org>
Cc: alsa-devel@alsa-project.org, lgirdwood@gmail.com,
yung-chuan.liao@linux.intel.com, pierre-louis.bossart@linux.dev,
perex@perex.cz, tiwai@suse.com, Basavaraj.Hiregoudar@amd.com,
Sunil-kumar.Dommati@amd.com, venkataprasad.potturu@amd.com,
mario.limonciello@amd.com, linux-sound@vger.kernel.org,
linux-kernel@vger.kernel.org,
sound-open-firmware@alsa-project.org
Subject: Re: [PATCH 16/16] ASoC: SOF: amd: add system and runtime PM ops for ACP7x
Date: Fri, 3 Jul 2026 23:21:21 +0530 [thread overview]
Message-ID: <04ffb72b-0027-492d-be0d-4b4178e21e1e@amd.com> (raw)
In-Reply-To: <632c9729-3f64-41fd-b85d-18f4437a68df@sirena.org.uk>
On 7/3/26 22:39, Mark Brown wrote:
> On Fri, Jul 03, 2026 at 10:21:25PM +0530, Mukunda,Vijendar wrote:
>> On 7/3/26 21:58, Mark Brown wrote:
>>> On Wed, Jul 01, 2026 at 03:25:17PM +0530, Vijendar Mukunda wrote:
>>> The interrupt is requested with IRQF_SHARED so probably worth double
>>> checking if the interrupt handler is safe to run while the suspend and
>>> resume callbacks are running, I see we reset the device during suspend
>>> so there might be some risk of corrupted register reads?
>> There won't be any corrupted register reads when acp reset sequence
>> is executed, all the acp registers are set to default values. i.e Interrupt
>> control registers are disabled. This sequence ensures that till interrupt
> Including whatever the threaded handler is doing? I didn't actually
> check properly, just saw the indirection through the SOF I/O functions
> and the threaded handler.
|The threaded handler (acp_sof_ipc_irq_thread) can only be scheduled when
acp7x_irq_handler returns IRQ_WAKE_THREAD, which only happens when
ACP_DSP_TO_HOST_IRQ is set in ACP_DSP_SW_INTR_STAT. By the time the
platform suspend callback runs, the SOF core has already quiesced the DSP
(ctx_save IPC, pipeline teardown), so no new DSP-to-host interrupt can
arrive. The subsequent acp_reset() then zeroes all interrupt-enable
registers, preventing any further IRQ_WAKE_THREAD from acp7x_irq_handler.
If a thread was already queued before reset completes, it runs
acp_sof_ipc_irq_thread which reads the scratch SRAM mailbox registers
(dsp_msg_write, dsp_ack_write). After a soft reset those registers read 0,
so the handler finds nothing to do and returns IRQ_HANDLED cleanly.|
>> masks are enabled during resume sequence, no interrupt will be asserted
>> for ACP IP.
> Right, but IRQF_SHARED means it might be an interrupt for something
> else.
Correct. If another device asserts the shared INTx line during suspend,
the kernel calls acp7x_irq_handler. In that case both ACP_DSP_SW_INTR_STAT
and ACP_EXT_INTR_STAT read 0 (device is reset/idle), so the handler
returns IRQ_NONE immediately without scheduling the thread or touching
any other registers. No corrupted reads or harmful side effects occur.
In practice the ACP PCI device on ACP7.B/7.F has the INTx line assigned
exclusively to itself — we verified on target that no other device shares
it. IRQF_SHARED is set solely because the kernel's PCI layer requires it
for INTx interrupts; omitting it causes request_threaded_irq to fail even
when the line is unshared.
We can drop IRQF_SHARED flag, if that is preferred. Please let us know.
next prev parent reply other threads:[~2026-07-03 17:52 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 9:55 [PATCH 00/16] ASoC: SOF: amd: add support for ACP7.B/7.F platforms Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 01/16] ASoC: amd: acp: add ACPI machine table for ACP7.B/7.F SOF driver Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 02/16] ASoC: SOF: amd: add base platform support for ACP7.B/7.F Vijendar Mukunda
2026-07-03 17:23 ` Julian Braha
2026-07-03 18:04 ` Mukunda,Vijendar
2026-07-01 9:55 ` [PATCH 03/16] ASoC: SOF: amd: mask ACP7x PGFSM status poll Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 04/16] ASoC: SOF: amd: refactor SW1 I2S error reason clear in acp_irq_handler Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 05/16] ASoC: SOF: amd: add ACP7x probe and remove Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 06/16] ASoC: SOF: amd: add ACP7x IRQ handler for DSP IPC Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 07/16] ASoC: SOF: amd: extend signed firmware pre-run for ACP7x Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 08/16] ASoC: SOF: amd: require full ACP header for ACP7 signed firmware Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 09/16] ASoC: SOF: amd: validate SizeFWSigned before signed FW length on ACP7x Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 10/16] ASoC: SOF: amd: add post-firmware-run delay for ACP7x Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 11/16] ASoC: SOF: amd: extend configure_and_run_sha_dma for ACPI signed FW flag Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 12/16] ASoC: SOF: amd: wire signed firmware load callback for ACP7x via ACPI Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 13/16] ASoC: SOF: amd: load ACP7.B/7.F signed data firmware to SRAM Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 14/16] ASoC: SOF: amd: add ACP I2S format field and topology token Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 15/16] ASoC: SOF: amd: add ACP7x I2S DAI type and topology support Vijendar Mukunda
2026-07-01 9:55 ` [PATCH 16/16] ASoC: SOF: amd: add system and runtime PM ops for ACP7x Vijendar Mukunda
2026-07-03 16:28 ` Mark Brown
2026-07-03 16:51 ` Mukunda,Vijendar
2026-07-03 17:09 ` Mark Brown
2026-07-03 17:51 ` Mukunda,Vijendar [this message]
2026-07-03 18:02 ` Mark Brown
2026-07-03 16:40 ` [PATCH 00/16] ASoC: SOF: amd: add support for ACP7.B/7.F platforms Mark Brown
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