Re: [PATCH v9 3/6] media: dt-bindings: Add Amlogic V4L2 video decoder

[Krzysztof Kozlowski <krzk@kernel.org>]

On 17/09/2026 05:07, Zhentao Guo wrote:
> Hi Krzysztof,
> 
>> On Mon, Sep 14, 2026 at 04:10:20PM +0800, Zhentao Guo wrote:
>>> Describe the initial support for the V4L2 stateless video decoder
>>> driver used with the Amlogic S4 (S805X2) platform.
>> Drop driver. Describe the hardware instead.
> OK，got it.
>>> Signed-off-by: Zhentao Guo <zhentao.guo@amlogic.com>
>>> ---
>>>   .../devicetree/bindings/media/amlogic,s4-vdec.yaml | 114 +++++++++++++++++++++
>>>   1 file changed, 114 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/media/amlogic,s4-vdec.yaml b/Documentation/devicetree/bindings/media/amlogic,s4-vdec.yaml
>>> new file mode 100644
>>> index 000000000000..d350b3e68a38
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/media/amlogic,s4-vdec.yaml
>>> @@ -0,0 +1,114 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +# Copyright (C) 2025 Amlogic, Inc. All rights reserved
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/media/amlogic,s4-vdec.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Amlogic Video Decode Accelerator
>>> +
>>> +maintainers:
>>> +  - Zhentao Guo <zhentao.guo@amlogic.com>
>>> +
>>> +description:
>>> +  The Video Decoder Accelerator present on Amlogic SOCs.
>>> +  It supports stateless h264 decoding.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    const: amlogic,s4-vdec
>>> +
>>> +  reg:
>>> +    maxItems: 2
>>> +
>>> +  reg-names:
>>> +    items:
>>> +      - const: dos
>>> +      - const: dmc
>>> +
>>> +  interrupts:
>>> +    maxItems: 2
>>> +
>>> +  interrupt-names:
>>> +    items:
>>> +      - const: core_hvdec
>>> +      - const: core_vdec
>> Drop "core_" from both... or rather some consistency would be more
>> useful. Below you call them core_v and core_h, but there is also:
>>
>>> +
>>> +  clocks:
>>> +    items:
>>> +      - description: Clock for dos core
>> core dos?
> 
> To explain this, I would like to show you the structure diagram of the 
> Amlogic hardware decoder IP:
> 
> +-----------+------------------------+
> |           |                        |
> |           |        vdec            |
> |           |                        |
> |    dos    +------------------------+
> |           |                        |
> |           |        hvdec           |
> |           |                        |
> +-----------+------------------------+
> 
> The IP consists of three cores. Dos core is in the front of the IP, 
> which controls the rest two cores. The actual hardware decoding is 
> handled by the two cores vdec and hvdec.
> 
> Each of the three cores has its own independent clock source.

So everything could be called consistently "dos", "vdec" and "hvdec" in
all properties (clocks, interrupts etC).

Best regards,
Krzysztof