Re: [PATCH 0/2] arm64: dts: intel: fix dw-apb-timer clock initialisation on Agilex and Agilex5

[Dinh Nguyen <dinguyen@kernel.org>]

On 5/26/26 17:00, Adrian Ng Ho Yin wrote:
> The DesignWare APB timers on Intel Agilex and Agilex5 SoCs fail to
> initialise because their clock managers are platform drivers registered
> at core_initcall, which runs after time_init() where TIMER_OF_DECLARE
> callbacks fire.  With clocks/clock-names in the DTS, the timer driver
> calls clk_get() at a point when the clock provider is not yet
> registered, causing the timers to never come up.
> 
> Replace the clocks/clock-names reference in both DTSIs with a static
> clock-frequency of 100 MHz, which is the L4_SP clock rate configured
> by the bootloader.  The dw-apb-timer binding explicitly supports this
> as an alternative when the clock framework is unavailable at probe time.
> 
> Adrian Ng Ho Yin (2):
>    arm64: dts: socfpga: agilex5: replace clocks reference with
>      clock-frequency for dw-apb-timer
>    arm64: dts: socfpga: agilex: replace clocks reference with
>      clock-frequency for dw-apb-timer
> 
>   arch/arm64/boot/dts/intel/socfpga_agilex.dtsi  | 12 ++++--------
>   arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 12 ++++--------
>   2 files changed, 8 insertions(+), 16 deletions(-)
> 

Do you want this to get backported to stable releeases? If so, please 
append a Fixes tag.

I think the same patch can be applied to socfpga_stratix10.dtsi.

Thanks,
Dinh