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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b9b202663c6sm240584466b.23.2026.03.27.03.26.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Mar 2026 03:26:49 -0700 (PDT) Message-ID: <0526dbcf-0f4a-4ff7-ba43-705448c989e8@oss.qualcomm.com> Date: Fri, 27 Mar 2026 11:26:46 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 2/7] dt-bindings: media: qcom,x1e80100-camss: Add support for combo-mode endpoints To: Bryan O'Donoghue , Vladimir Zapolskiy , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , Mauro Carvalho Chehab , Konrad Dybcio , Bryan O'Donoghue Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, Krzysztof Kozlowski , Christopher Obbard References: <20260326-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v11-0-5b93415be6dd@linaro.org> <20260326-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v11-2-5b93415be6dd@linaro.org> <17ab70a4-1ab8-4384-8537-44dbfe31889a@linaro.org> <540c2a97-00ec-4358-855a-b238aab53860@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <540c2a97-00ec-4358-855a-b238aab53860@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI3MDA3NSBTYWx0ZWRfXylGeRy+/U57g DNnlK/wEmii9yVF+N6PpS6ybMjVKUAYXWWxW1zymron9C6hBsknefSZjOHmq/Yd+gqwNo6DUKZW A/YCVRMuiaLXHV7fVQJi3Ppqo9jSf42NB3xeX4t1WJ52jLlncvMghyYdYdFSumfR73ZnkrCCF78 A0HF+v5c80PS344zk1GmpE7MYFZE07+8pRD+z5ZBKy/tKNz+Neh4jtKEly0B/M37i1SN0AbwavW cIiO5ripUBb5Wqj/cYiyPVc/QnFjnCaDH3Mn4OvsrObb5lEyRLcHdClkhOEduv46KmgL54gZfub DzhaH7MzZBwZ6Ck5//fz6TLgY0TX/K77J+KVPRidSRpXt8wkP9qrH5pk6vUtJmcSsJXS4WsxsUb 7+TwNohDtdwkFtIiwezTgOdwzmS7s1ZYODDY5kqg/hqd30HOw1X2lLG9ZdJfOC+Vhy7C8CETt6F 36GfIOq9KVkE/XjvUQQ== X-Authority-Analysis: v=2.4 cv=CcwFJbrl c=1 sm=1 tr=0 ts=69c65b6b cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=KKAkSRfTAAAA:8 a=0v9nonJskobKTEXhuRwA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: A0aZX69YwkfKmS091LN8-ijq_YO5A_ss X-Proofpoint-GUID: A0aZX69YwkfKmS091LN8-ijq_YO5A_ss X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-26_04,2026-03-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603270075 On 3/26/26 3:08 AM, Bryan O'Donoghue wrote: > On 26/03/2026 01:51, Vladimir Zapolskiy wrote: >> On 3/26/26 03:28, Bryan O'Donoghue wrote: >>> Qualcomm CSI2 PHYs support a mode where two sensors may be attached to the >>> one CSIPHY. >>> >>> When we have one endpoint we may have >>> - DPHY 1, 2 or 4 data lanes + 1 clock lane >>> - CPHY 3 wire data lane >>> >>> When we have two endpoints this indicates the special fixed combo-mode. >>> - DPHY endpoint0 => 2+1 and endpoint1 => 1+1 data-lane/clock-lane combination. >>> >>> Reviewed-by: Christopher Obbard >>> Signed-off-by: Bryan O'Donoghue >>> --- [...] >>> +              bus-type: >>> +                const: 4 # Combo is D-PHY specific >>> + >> >> It's unclear why both 'bus-type' and 'phys' cell argument are needed >> at the same time, they are equal and thus one of two is redundant. >> > > bus-type lives on the CAMSS controller endpoint. It tells the V4L2 fwnode parser (v4l2_fwnode_endpoint_parse) how to interpret the endpoint properties — DPHY has data-lanes + clock-lanes, CPHY has trios. > > PHY phandle cell lives on the phys reference. It tells the PHY driver which electrical mode to configure But we don't need that second part, no? If it's strictly required that we keep the bus-type in DT, we already store that information once and can translate MEDIA_BUS_TYPE_CSI2_DPHY to PHY_MODE_MIPI_CSI or whatever before we power on the PHY (which we wouldn't do without first setting up other bits of the topology anyway) Konrad