From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3A15C43613 for ; Mon, 24 Jun 2019 13:33:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C942A212F5 for ; Mon, 24 Jun 2019 13:33:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Lj7qLlEk" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731176AbfFXNdS (ORCPT ); Mon, 24 Jun 2019 09:33:18 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49238 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729145AbfFXNdR (ORCPT ); Mon, 24 Jun 2019 09:33:17 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5ODX3H1103654; Mon, 24 Jun 2019 08:33:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1561383183; bh=T0b0y9lRm0PF/7Q++y9fxvMPpbsAZoaqD8rEIUJSye0=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=Lj7qLlEk0mkinY9mM7qWIgaS7ynCHyCu9/jnLcJuqMn4gUcHh8isfl3iKuKQTg9Oo daJO0tQfP8Ia6dlSQ40TTwSm2KOu/VkQ4O4HEx3QOz7wt6QXcvxKX/WUSUk0AXxdd5 2w/jfbmpYWcwiUXN+Gox2dYFrb+EWYhc/gYxbXpg= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5ODX3f7096762 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 24 Jun 2019 08:33:03 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 24 Jun 2019 08:33:03 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 24 Jun 2019 08:33:03 -0500 Received: from [172.24.190.89] (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5ODWxcF056686; Mon, 24 Jun 2019 08:33:00 -0500 Subject: Re: [PATCH v7 3/5] mtd: Add support for HyperBus memory devices To: Sergei Shtylyov , Boris Brezillon , Marek Vasut , Richard Weinberger , Rob Herring CC: , Miquel Raynal , , Mason Yang , , References: <20190620172250.9102-1-vigneshr@ti.com> <20190620172250.9102-4-vigneshr@ti.com> <4d17e914-cd1f-c6fe-b70a-6aae02e0cf4e@cogentembedded.com> From: Vignesh Raghavendra Message-ID: <053894bc-1536-0b6c-5255-ab9be6d66eee@ti.com> Date: Mon, 24 Jun 2019 19:03:44 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.1 MIME-Version: 1.0 In-Reply-To: <4d17e914-cd1f-c6fe-b70a-6aae02e0cf4e@cogentembedded.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 22/06/19 1:22 AM, Sergei Shtylyov wrote: > Hello! > > On 06/20/2019 08:22 PM, Vignesh Raghavendra wrote: > >> Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate >> Bus interface between a host system master and one or more slave >> interfaces. HyperBus is used to connect microprocessor, microcontroller, >> or ASIC devices with random access NOR flash memory (called HyperFlash) >> or self refresh DRAM (called HyperRAM). >> >> Its a 8-bit data bus (DQ[7:0]) with Read-Write Data Strobe (RWDS) >> signal and either Single-ended clock(3.0V parts) or Differential clock >> (1.8V parts). It uses ChipSelect lines to select b/w multiple slaves. >> At bus level, it follows a separate protocol described in HyperBus >> specification[1]. >> >> HyperFlash follows CFI AMD/Fujitsu Extended Command Set (0x0002) similar >> to that of existing parallel NORs. Since HyperBus is x8 DDR bus, >> its equivalent to x16 parallel NOR flash wrt bits per clock cycle. But >> HyperBus operates at >166MHz frequencies. > > s/wrt/WRT/. OK [...] >> diff --git a/include/linux/mtd/hyperbus.h b/include/linux/mtd/hyperbus.h >> new file mode 100644 >> index 000000000000..ead969aad35b >> --- /dev/null >> +++ b/include/linux/mtd/hyperbus.h >> @@ -0,0 +1,86 @@ > [...] >> +/** >> + * struct hyperbus_ops - struct representing custom HyperBus operations >> + * @read16: read 16 bit of data to flash in a single burst. Used to read > > s/to flash/from flash/. > Will fix > [...] >> +#endif /* __LINUX_MTD_HYPERBUS_H__ */ > > I thought you agreed to add the #defines for the HF commands. Well, I can add them > as well... > Sorry, I thought you were proposing to add them to your driver's header file. Anyways, I think its better to add defines when there is an actual user. If there are no further comments, I will fixup things locally and queue up for next release. -- Regards Vignesh