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Received: from AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) by PA4PR04MB9662.eurprd04.prod.outlook.com (2603:10a6:102:260::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8207.17; Wed, 4 Dec 2024 03:42:16 +0000 Received: from AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90]) by AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90%6]) with mapi id 15.20.8207.017; Wed, 4 Dec 2024 03:42:16 +0000 Message-ID: <054a0278-428f-49cb-b0f0-182c5bb3b61b@nxp.com> Date: Wed, 4 Dec 2024 11:42:51 +0800 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] drm/bridge: ite-it6263: Support VESA input format To: Dmitry Baryshkov , tomm.merciai@gmail.com Cc: linux-renesas-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, biju.das.jz@bp.renesas.com, Tommaso Merciai , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org References: <20241203172129.778123-1-tommaso.merciai.xr@bp.renesas.com> From: Liu Ying Content-Language: en-US In-Reply-To: Content-Type: text/plain; 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According to ite,it6263.yaml, the bridge supports all the data mappings(jeida-{18,24,30} and vesa-{24,30}) listed in lvds-data-mapping.yaml. lvds-data-mapping.yaml specifies the data lanes(3/4/5) used by each of the data mappings. So, the bridge supports 3, 4 or 5 data lanes. > >> >> Signed-off-by: Tommaso Merciai >> --- >> drivers/gpu/drm/bridge/ite-it6263.c | 25 ++++++++++++++++++++++--- >> 1 file changed, 22 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/gpu/drm/bridge/ite-it6263.c b/drivers/gpu/drm/bridge/ite-it6263.c >> index cbabd4e20d3e..83d1db29157a 100644 >> --- a/drivers/gpu/drm/bridge/ite-it6263.c >> +++ b/drivers/gpu/drm/bridge/ite-it6263.c >> @@ -48,6 +48,7 @@ >> #define REG_COL_DEP GENMASK(1, 0) >> #define BIT8 FIELD_PREP(REG_COL_DEP, 1) >> #define OUT_MAP BIT(4) >> +#define VESA BIT(4) >> #define JEIDA 0 >> #define REG_DESSC_ENB BIT(6) >> #define DMODE BIT(7) >> @@ -428,12 +429,30 @@ static inline void it6263_lvds_reset(struct it6263 *it) >> fsleep(10000); >> } >> >> +static bool it6263_is_input_bus_fmt_valid(u32 input_fmt) >> +{ >> + switch (input_fmt) { >> + case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA: >> + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG: >> + return true; >> + } >> + return false; >> +} >> + > -- Regards, Liu Ying