From: David Laight <David.Laight@ACULAB.COM>
To: "'Alexander Duyck'" <alexander.duyck@gmail.com>,
Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Cc: Eric Dumazet <edumazet@google.com>,
David Miller <davem@davemloft.net>,
Jeff Kirsher <jeffrey.t.kirsher@intel.com>,
intel-wired-lan <intel-wired-lan@lists.osuosl.org>,
Netdev <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Chris Healy <cphealy@gmail.com>
Subject: RE: igb driver can cause cache invalidation of non-owned memory?
Date: Thu, 13 Oct 2016 10:39:52 +0000 [thread overview]
Message-ID: <063D6719AE5E284EB5DD2968C1650D6DB01E773C@AcuExch.aculab.com> (raw)
In-Reply-To: <CAKgT0UdMG4D8CZCVhBD7vF+E5aOk7zyPEp1xXaBukg3v0aYfFg@mail.gmail.com>
From: Alexander Duyck
> Sent: 12 October 2016 19:30
> On Wed, Oct 12, 2016 at 11:12 AM, Nikita Yushchenko
> <nikita.yoush@cogentembedded.com> wrote:
> >> It would make more sense to update the DMA API for
> >> __dma_page_cpu_to_dev on ARM so that you don't invalidate the cache if
> >> the direction is DMA_FROM_DEVICE.
> >
> > No, in generic case it's unsafe.
> >
> > If CPU issued a write to a location, and sometime later that location is
> > used as DMA buffer, there is danger that write is still in cache only,
> > and writeback is pending. Later this writeback can overwrite data
> > written to memory via DMA, causing corruption.
>
> Okay so if I understand it correctly then the invalidation in
> sync_for_device is to force any writes to be flushed out, and the
> invalidation in sync_for_cpu is to flush out any speculative reads.
> So without speculative reads then the sync_for_cpu portion is not
> needed. You might want to determine if the core you are using
> supports the speculative reads, if not you might be able to get away
> without having to do the sync_for_cpu at all.
For reads the sync_for_device invalidates (ie discards the contents of)
the cache lines to ensure the cpu won't write back dirty lines.
The sync_for_cpu invalidates the cache to ensure the cpu actually
reads from memory.
For writes you need to flush (write back) cache lines prior to the DMA.
I don't think anything is needed when the transfer finishes.
If headers/trailers might be added the sync_for_device must cover
the entire area the frame will be written to.
Clearly the sync_for_cpu need only cover the valid frame data.
I suspect you can safely skip the sync_for_device in the 'copybreak'
path but not if the frame is passed up the protocol stack.
David
next prev parent reply other threads:[~2016-10-13 10:40 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-10 8:52 Nikita Yushchenko
2016-10-10 9:01 ` David Miller
2016-10-10 9:51 ` Nikita Yushchenko
2016-10-10 11:57 ` David Miller
2016-10-10 12:27 ` Nikita Yushchenko
2016-10-10 12:31 ` Nikita Yushchenko
2016-10-10 15:11 ` Alexander Duyck
2016-10-10 17:00 ` Nikita Yushchenko
2016-10-10 17:38 ` Alexander Duyck
2016-10-12 6:55 ` Nikita Yushchenko
2016-10-12 15:32 ` Alexander Duyck
2016-10-12 16:03 ` David Laight
2016-10-12 16:11 ` Nikita Yushchenko
2016-10-12 17:56 ` Alexander Duyck
2016-10-12 18:12 ` Nikita Yushchenko
2016-10-12 18:30 ` Alexander Duyck
2016-10-13 10:39 ` David Laight [this message]
2016-10-13 11:00 ` Nikita Yushchenko
2016-10-13 20:32 ` Alexander Duyck
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