From: Philipp Zabel <p.zabel@pengutronix.de>
To: Wenbin Yao <quic_wenbyao@quicinc.com>,
vkoul@kernel.org, kishon@kernel.org,
dmitry.baryshkov@linaro.org, abel.vesa@linaro.org,
quic_qianyu@quicinc.com, neil.armstrong@linaro.org,
manivannan.sadhasivam@linaro.org, quic_devipriy@quicinc.com,
konrad.dybcio@oss.qualcomm.com, linux-arm-msm@vger.kernel.org,
linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/2] phy: qcom: pcie: Determine has_nocsr_reset dynamically
Date: Fri, 14 Feb 2025 11:49:46 +0100 [thread overview]
Message-ID: <067e9396ed8629efa7190c0103ac3a29d0c469d8.camel@pengutronix.de> (raw)
In-Reply-To: <20250214104539.281846-2-quic_wenbyao@quicinc.com>
On Fr, 2025-02-14 at 18:45 +0800, Wenbin Yao wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> Decide the in-driver logic based on whether the nocsr reset is present
> and defer checking the appropriateness of that to dt-bindings to save
> on boilerplate.
>
> Reset controller APIs are fine consuming a nullptr, so no additional
> checks are necessary there.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Wenbin Yao <quic_wenbyao@quicinc.com>
> Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
regards
Philipp
next prev parent reply other threads:[~2025-02-14 10:50 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-14 10:45 [PATCH v3 0/2] phy: qcom: qmp-pcie: Add PCIe PHY no_csr reset support Wenbin Yao
2025-02-14 10:45 ` [PATCH v3 1/2] phy: qcom: pcie: Determine has_nocsr_reset dynamically Wenbin Yao
2025-02-14 10:49 ` Philipp Zabel [this message]
2025-02-14 10:45 ` [PATCH v3 2/2] phy: qcom: qmp-pcie: Add PHY register retention support Wenbin Yao
2025-02-14 14:46 ` Manivannan Sadhasivam
2025-02-17 10:05 ` Qiang Yu
2025-02-17 10:08 ` Wenbin Yao (Consultant)
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