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Thu, 15 Oct 2026 00:15:44 -0700 (PDT) X-Received: by 2002:a17:90b:1d52:b0:3aa:fc22:8ab1 with SMTP id 98e67ed59e1d1-3ab3a8a1ad5mr16246267a91.35.1792048543623; Thu, 15 Oct 2026 00:15:43 -0700 (PDT) Received: from [10.217.216.28] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ac92a43d98sm1617534a91.0.2026.10.15.00.15.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Oct 2026 00:15:43 -0700 (PDT) Message-ID: <0691ab2d-1ca5-4140-af77-05bbf718d205@oss.qualcomm.com> Date: Thu, 15 Oct 2026 12:45:37 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] clk: qcom: Add a driver for PDM GP_MN fractional clock divider To: Dmitry Baryshkov Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Richard Cochran , Konrad Dybcio , Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, netdev@vger.kernel.org References: <20260602-pdm_clk_gp_mnd_v1-v1-0-1522662b6c53@oss.qualcomm.com> <20260602-pdm_clk_gp_mnd_v1-v1-2-1522662b6c53@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=VKpIDNPX c=1 sm=1 tr=0 ts=6ad07da0 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=a29RP2Si9AT6pp-L1QcA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE1MDAyOCBTYWx0ZWRfXy/cueF1y8hAm 8baA1dzz24NrBXeKNbAoFhVNKc+6ErkKkFPQHZK/OTtftu1kWQFAR56xCILSiqRd82TSL1Ofq34 oqv7Ov4L46O4i160EdmIHwzbJZbnxik= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE1MDAyOCBTYWx0ZWRfXx4gZTQ1SdC1f QJbQLa2w3pkX37RQzGL5DU0Ymencw2PPu6sJYM3slCxXFjQ2prVIZfDZ3SLY8nBvl1d2RIoxTMW XuRi8mAyjbX0pngWG9y9cf5BOWyZf7aA1Sw6HQCfd13ecn/9XCvY3BSH1FOrWJUAXdfHK5tDA52 TteTcKNdTJa+dsoymJqSxCAL6StgS0xUzD+cudB2IUsnfSNIO2wvuaVujqVP+Y33/Hy0hhrCEnG khZ9bTzYOrgJKm9AjAdYhAlFWnJsJ/slX0WlEIHcus22zur6LuwtzatBhPbhHjgZIQdjk3AnR6D fu7Sq5UEDoaC0IGzdDlGE84G7uWvohOi3FbSaQ7CbSpavVaBgyozJggtO/P2pGjxfgXyVEi1k5Q fuPwvwm1L9DdGM7DwjgaUXG+MrDIpcwIc4/DXxkHp0cTUDxEbTi8uLZXx+g9L48AcB6BANQNLmY 5oERwg1ja+vfJhIJOXw== X-Proofpoint-ORIG-GUID: wvHg2bcIoxy_liSuBWX3KunhMUbcSkqK X-Proofpoint-GUID: wvHg2bcIoxy_liSuBWX3KunhMUbcSkqK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-13_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 malwarescore=0 phishscore=0 spamscore=0 clxscore=1015 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610150028 On 6/8/2026 9:01 AM, Dmitry Baryshkov wrote: >> +static int gp_mnd_clk_set_rate(struct clk_hw *hw, unsigned long rate, >> + unsigned long parent_rate) >> +{ >> + struct clk_gp_mnd *gp = to_clk_gp_mnd(hw); >> + unsigned long m = 0, n = 0; >> + unsigned int d_val, n_val; >> + int ret; >> + >> + rational_best_approximation(rate, parent_rate, >> + (unsigned long)GP_MND_MAX_M, >> + (unsigned long)GP_MND_MAX_N, >> + &m, &n); >> + >> + if (!m || !n) >> + return -EINVAL; >> + >> + /* >> + * When N = 2M + 1 the valid D range [M+1, M] is empty; no duty >> + * cycle can satisfy M < D < (N - M). Reject before touching hw. >> + */ >> + if (n == 2 * m + 1) >> + return -EINVAL; >> + >> + ret = clk_prepare_enable(gp->pdm_ahb_clk); > Can we use CLK_OPS_PARENT_ENABLE or pm_clk instead? Having to manually > toggle the clock looks like a coomplete overkill. > Sorry for the delayed response. Yes, I will model it as pm_clk. >> + if (ret) >> + return ret; >> + >> + >> + ret = of_property_read_string_index(dev->of_node, >> + "clock-output-names", 0, >> + &init.name); > Do we need it? Can we generate the name instead? Yes, I will generate the name. > >> + if (ret) >> + return dev_err_probe(dev, ret, "missing clock-output-names\n"); >> + >> + gp->hw.init = &init; >> + >> + pin = devm_pinctrl_get(dev); >> + if (IS_ERR(pin)) >> + return dev_err_probe(dev, PTR_ERR(pin), "missing pinctrl device\n"); >> + >> + pin_default_state = pinctrl_lookup_state(pin, "active"); >> + if (IS_ERR(pin_default_state)) >> + return dev_err_probe(dev, PTR_ERR(pin_default_state), >> + "missing pinctrl default state\n"); > Isn't it done by default for you? > Yeah, I will move it to default. >> + >> + ret = pinctrl_select_state(pin, pin_default_state); >> + if (ret) >> + return dev_err_probe(dev, ret, >> + "failed to select pinctrl default state\n"); >> + >> + ret = devm_clk_hw_register(dev, &gp->hw); >> + if (ret) >> + return dev_err_probe(dev, ret, >> + "failed to register gp_mnd clock\n"); >> + >> + return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &gp->hw); >> +} >> + >> +static const struct of_device_id clk_gp_mnd_match_table[] = { >> + { .compatible = "qcom,clk-gp-mnd" }, >> + { } >> +}; >> +MODULE_DEVICE_TABLE(of, clk_gp_mnd_match_table); >> + >> +static struct platform_driver clk_gp_mnd_driver = { >> + .probe = clk_gp_mnd_probe, >> + .driver = { >> + .name = "qcom-clk-gp-mnd", >> + .of_match_table = clk_gp_mnd_match_table, >> + }, >> +}; >> +module_platform_driver(clk_gp_mnd_driver); >> + >> +MODULE_DESCRIPTION("Qualcomm PDM GP_MND clock divider driver"); >> +MODULE_LICENSE("GPL"); -- Thanks, Taniya Das