From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756069AbcIOUQb (ORCPT ); Thu, 15 Sep 2016 16:16:31 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:32853 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752280AbcIOUQV (ORCPT ); Thu, 15 Sep 2016 16:16:21 -0400 Date: Thu, 15 Sep 2016 23:16:11 +0300 From: Moshe Green To: sudipm.mukherjee@gmail.com, teddy.wang@siliconmotion.com, gregkh@linuxfoundation.org Cc: linux-fbdev@vger.kernel.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] staging: sm750fb: fix block comment style and spelling issues in ddk750_chip.c Message-ID: <06a2b5c2323140695fd2155cd70abeac92e4bf0e.1473970394.git.mgmoshes@gmail.com> References: <3073702d63fb782f3b4f3932eb183433f76ce91b.1473970394.git.mgmoshes@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3073702d63fb782f3b4f3932eb183433f76ce91b.1473970394.git.mgmoshes@gmail.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fix the following warning types: - line length - block comment line * prefix - trailing */ on a separate line found by the checkpatch.pl tool in multiple block comments. Fix a single spelling error in a comment. Signed-off-by: Moshe Green --- drivers/staging/sm750fb/ddk750_chip.c | 49 +++++++++++++++++++---------------- 1 file changed, 27 insertions(+), 22 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 7cba1ab..f557b6d 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -145,8 +145,9 @@ static void setMasterClock(unsigned int frequency) return; if (frequency) { - /* Set the frequency to the maximum frequency that the SM750 engine can - run, which is about 190 MHz. */ + /* Set the frequency to the maximum frequency + * that the SM750 engine can run, which is about 190 MHz. + */ if (frequency > MHz(190)) frequency = MHz(190); @@ -243,9 +244,10 @@ int ddk750_initHw(initchip_param_t *pInitParam) setMasterClock(MHz(pInitParam->masterClock)); - /* Reset the memory controller. If the memory controller is not reset in SM750, - the system might hang when sw accesses the memory. - The memory should be resetted after changing the MXCLK. + /* Reset the memory controller. + * If the memory controller is not reset in SM750, + * the system might hang when sw accesses the memory. + * The memory should be resetted after changing the MXCLK. */ if (pInitParam->resetMemory == 1) { reg = PEEK32(MISC_CTRL); @@ -289,21 +291,22 @@ int ddk750_initHw(initchip_param_t *pInitParam) } /* - monk liu @ 4/6/2011: - re-write the calculatePLL function of ddk750. - the original version function does not use some mathematics tricks and shortcut - when it doing the calculation of the best N,M,D combination - I think this version gives a little upgrade in speed - - 750 pll clock formular: - Request Clock = (Input Clock * M )/(N * X) - - Input Clock = 14318181 hz - X = 2 power D - D ={0,1,2,3,4,5,6} - M = {1,...,255} - N = {2,...,15} -*/ + * monk liu @ 4/6/2011: + * re-write the calculatePLL function of ddk750. + * the original version function does not use + * some mathematics tricks and shortcut + * when it doing the calculation of the best N,M,D combination + * I think this version gives a little upgrade in speed + * + * 750 pll clock formular: + * Request Clock = (Input Clock * M )/(N * X) + * + * Input Clock = 14318181 hz + * X = 2 power D + * D ={0,1,2,3,4,5,6} + * M = {1,...,255} + * N = {2,...,15} + */ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) { /* as sm750 register definition, @@ -318,8 +321,10 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) int max_d = 6; if (getChipType() == SM750LE) { - /* SM750LE don't have prgrammable PLL and M/N values to work on. - Just return the requested clock. */ + /* SM750LE don't have + * programmable PLL and M/N values to work on. + * Just return the requested clock. + */ return request_orig; } -- 2.7.4