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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwODI0MDA3NiBTYWx0ZWRfX0Na0V+mQNJky jHo7+J9Dbzs9tAlQwExa/p3lNGJvGsLdPrjlgXPdIV6YZ+hX3MlSX/tEmKjQOIv09mkWgS/Mz6v hdqmnSSkgc3Jl43+lxU/3NN/U6eh9f0= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI0MDA3NiBTYWx0ZWRfXzQh0U+E07hNr f6S+y42wqiBWTIP0ZnqCkmRAk5M+Uktwqhv293E4JfdfaPGyrv22hNVvMVNFWyhq7d2HH3wdXtb 22t49AX1OiK7zRjShvnyP2ZM2b7p3xtdvpvUoMoKK43g7M58gqtEkAEXKDWE9h43AybG8KoLC9U E8FHftgYtUN19JNwcCnzGxDOQXuz49r7UgKoMGi2ZC1nH15F8+nHHcoFkwlanmpRXyYbrwz4dRi 7r+owr+9IfnZ+QdT5sh6IDzRlzJ6RgcZJGbgpzosGH0uKOVfrvPAofuCSJES1JMuImSfhwyGb3m Yuqmwn112QNvr2EK4BFqN4MLPq4xFscWLiQqAIcWAP7K/iVWhefVOl/FljeoIBK6+8n2n9ZKh/X iAOrtT0IL9RIGV8UnuGhuxX5r45Iv8bLhs6CJo4vvr0aBJZ3YKRLRcLtF9OG8BqzjKNJN/ACM61 3XPlFoR5WWie+wpYBEw== X-Proofpoint-ORIG-GUID: zXhh4GLzwUDvhUG2izg0qxeTRXSUYG8O X-Authority-Analysis: v=2.4 cv=CoCPtH4D c=1 sm=1 tr=0 ts=6a8c0467 cx=c_pps a=P2rfLEam3zuxRRdjJWA2cw==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=eCN_Hj2St81N8EpzqcMA:9 a=QEXdDO2ut3YA:10 a=ODZdjJIeia2B_SHc_B0f:22 X-Proofpoint-GUID: zXhh4GLzwUDvhUG2izg0qxeTRXSUYG8O X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-24_02,2026-08-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 malwarescore=0 phishscore=0 bulkscore=0 adultscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608240076 On 8/20/26 3:15 AM, Shawn Guo wrote: > On Wed, Aug 19, 2026 at 05:27:34PM +0200, Konrad Dybcio wrote: >> On 8/19/26 5:23 PM, Shawn Guo wrote: >>> QUP1 SE2 and SE3 pack all four of their lanes pair-wise onto only two >>> pins each: lanes 0/1 (I2C SDA/SCL) at mux value 2 and lanes 2/3 (UART >>> TX/RX) at mux value 1, on gpio127/gpio128 and gpio129/gpio130 >>> respectively. >> >> [...] >> >>> + msm_mux_qup1_se2_01, >> >> other drivers where this is necessary stick an 'l' before the >> lane indices, e.g. se2_l2, let's keep this > > I can see that for single lane function. But for lane-pair function, > it's not a new thing with nord, and the naming convention seems to be > without 'l', based on what I see from shikra, eliza, hawi and maili > drivers. Hm, seems like that happened by oversight, but yeah let's stick to it now. >> The bindings change must be separate > > I understand that's mandatory for new feature changes, but for such > a bug fix where both binding and driver changes are closely coupled, > it seems more reasonable to not split. Up to brgl Konrad