From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932089AbdLTRNV (ORCPT ); Wed, 20 Dec 2017 12:13:21 -0500 Received: from mail-pf0-f195.google.com ([209.85.192.195]:36250 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753724AbdLTRNR (ORCPT ); Wed, 20 Dec 2017 12:13:17 -0500 X-Google-Smtp-Source: ACJfBovdor0IThe1gTH4VS+CquwhFmD84A6XdoIxWA7geVsPhYPArMMtj4LFNdY/+fl1ktk7jh4XJw== Subject: Re: [PATCH 1/3] dt-bindings: ARM: Mediatek: Fix ethsys documentation To: Stephen Boyd Cc: Michael Turquette , linux@armlinux.org.uk, sean.wang@mediatek.com, chen.zhong@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org References: <20171201120708.30129-1-matthias.bgg@gmail.com> <20171219013222.GZ7997@codeaurora.org> From: Matthias Brugger Message-ID: <06b927e4-ed1b-9e1a-becf-e2818e7efe6d@gmail.com> Date: Wed, 20 Dec 2017 18:13:12 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20171219013222.GZ7997@codeaurora.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/19/2017 02:32 AM, Stephen Boyd wrote: > On 12/14, Matthias Brugger wrote: >> Hi Stephen, Michael, >> >> On 12/01/2017 01:07 PM, Matthias Brugger wrote: >>> The ethsys registers a reset controller, so we need to specify a >>> reset cell. This patch fixes the documentation. >>> >>> Signed-off-by: Matthias Brugger >>> --- >>> Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt >>> index 7aa3fa167668..6cc7840ff37a 100644 >>> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt >>> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt >>> @@ -20,4 +20,5 @@ ethsys: clock-controller@1b000000 { >>> compatible = "mediatek,mt2701-ethsys", "syscon"; >>> reg = <0 0x1b000000 0 0x1000>; >>> #clock-cells = <1>; >>> + #reset-cells = <1>; >>> }; >>> >> >> Will you take this patch through the clk tree, or shall I take it through my SoC >> tree? >> > > It's resets, we are clk maintainers. I'm clkfused. > > You can take it, along with my > > Acked-by: Stephen Boyd > > if you like/expect conflicts. > These are resets in the clock IP-block. I'll take it through my branch, I don't expect any conflicts. Regards, Matthias