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b=FbyOye/HYA/oN/IYBhN7sdBkDnWJz8rOgXEcmikUH4/Yxyy2o7SmSNOfw+5AxM3HA6ZBJv7L25ZnlOkCSnZHBE6RiDPpGabizEO4zCYuvFexruIq9dRFWB2D9sLYsvCyeJ2iHPY0ZCmjFXxMSn/m7EkSvPwmRXcDTRxuq63FVR4= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; Received: from MN0PR12MB6101.namprd12.prod.outlook.com (2603:10b6:208:3cb::10) by SJ2PR12MB8881.namprd12.prod.outlook.com (2603:10b6:a03:546::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8398.24; Wed, 5 Feb 2025 17:51:13 +0000 Received: from MN0PR12MB6101.namprd12.prod.outlook.com ([fe80::37ee:a763:6d04:81ca]) by MN0PR12MB6101.namprd12.prod.outlook.com ([fe80::37ee:a763:6d04:81ca%4]) with mapi id 15.20.8398.025; Wed, 5 Feb 2025 17:51:13 +0000 Message-ID: <0785e275-5c0b-4cf8-b8db-4396a81949ed@amd.com> Date: Wed, 5 Feb 2025 11:46:37 -0600 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 07/12] cpufreq/amd-pstate: Modularize perf<->freq conversion To: Dhananjay Ugwekar , gautham.shenoy@amd.com, rafael@kernel.org, viresh.kumar@linaro.org Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org References: <20250205112523.201101-1-dhananjay.ugwekar@amd.com> <20250205112523.201101-8-dhananjay.ugwekar@amd.com> Content-Language: en-US From: Mario Limonciello In-Reply-To: <20250205112523.201101-8-dhananjay.ugwekar@amd.com> Content-Type: text/plain; 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> > +static inline u8 freq_to_perf(struct amd_cpudata *cpudata, unsigned int freq_val) > +{ > + u8 perf_val = DIV_ROUND_UP_ULL((u64)freq_val * cpudata->nominal_perf, > + cpudata->nominal_freq); > + > + return clamp_t(u8, perf_val, cpudata->lowest_perf, cpudata->highest_perf); > +} > + > +static inline u32 perf_to_freq(struct amd_cpudata *cpudata, u8 perf_val) > +{ > + return DIV_ROUND_UP_ULL((u64)cpudata->nominal_freq * perf_val, > + cpudata->nominal_perf); > +} > + > static int __init dmi_matched_7k62_bios_bug(const struct dmi_system_id *dmi) > { > /** > @@ -534,14 +548,12 @@ static inline bool amd_pstate_sample(struct amd_cpudata *cpudata) > static void amd_pstate_update(struct amd_cpudata *cpudata, u8 min_perf, > u8 des_perf, u8 max_perf, bool fast_switch, int gov_flags) > { > - unsigned long max_freq; > struct cpufreq_policy *policy = cpufreq_cpu_get(cpudata->cpu); > u8 nominal_perf = READ_ONCE(cpudata->nominal_perf); > > des_perf = clamp_t(u8, des_perf, min_perf, max_perf); > > - max_freq = READ_ONCE(cpudata->max_limit_freq); > - policy->cur = div_u64(des_perf * max_freq, max_perf); > + policy->cur = perf_to_freq(cpudata, des_perf); > > if ((cppc_state == AMD_PSTATE_GUIDED) && (gov_flags & CPUFREQ_GOV_DYNAMIC_SWITCHING)) { > min_perf = des_perf; > @@ -591,14 +603,11 @@ static int amd_pstate_verify(struct cpufreq_policy_data *policy_data) > > static int amd_pstate_update_min_max_limit(struct cpufreq_policy *policy) > { > - u8 max_limit_perf, min_limit_perf, max_perf; > - u32 max_freq; > + u8 max_limit_perf, min_limit_perf; > struct amd_cpudata *cpudata = policy->driver_data; > > - max_perf = READ_ONCE(cpudata->highest_perf); > - max_freq = READ_ONCE(cpudata->max_freq); > - max_limit_perf = div_u64(policy->max * max_perf, max_freq); > - min_limit_perf = div_u64(policy->min * max_perf, max_freq); > + max_limit_perf = freq_to_perf(cpudata, policy->max); > + min_limit_perf = freq_to_perf(cpudata, policy->min); > > if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) > min_limit_perf = min(cpudata->nominal_perf, max_limit_perf); > @@ -616,21 +625,15 @@ static int amd_pstate_update_freq(struct cpufreq_policy *policy, > { > struct cpufreq_freqs freqs; > struct amd_cpudata *cpudata = policy->driver_data; > - u8 des_perf, cap_perf; > - > - if (!cpudata->max_freq) > - return -ENODEV; > + u8 des_perf; > > if (policy->min != cpudata->min_limit_freq || policy->max != cpudata->max_limit_freq) > amd_pstate_update_min_max_limit(policy); > > - cap_perf = READ_ONCE(cpudata->highest_perf); > - > freqs.old = policy->cur; > freqs.new = target_freq; > > - des_perf = DIV_ROUND_CLOSEST(target_freq * cap_perf, > - cpudata->max_freq); > + des_perf = freq_to_perf(cpudata, target_freq); > > WARN_ON(fast_switch && !policy->fast_switch_enabled); > /* > @@ -904,7 +907,6 @@ static int amd_pstate_init_freq(struct amd_cpudata *cpudata) > { > int ret; > u32 min_freq, max_freq; > - u8 highest_perf, nominal_perf, lowest_nonlinear_perf; > u32 nominal_freq, lowest_nonlinear_freq; > struct cppc_perf_caps cppc_perf; > > @@ -922,16 +924,17 @@ static int amd_pstate_init_freq(struct amd_cpudata *cpudata) > else > nominal_freq = cppc_perf.nominal_freq; > > - highest_perf = READ_ONCE(cpudata->highest_perf); > - nominal_perf = READ_ONCE(cpudata->nominal_perf); > - max_freq = div_u64((u64)highest_perf * nominal_freq, nominal_perf); > + min_freq *= 1000; > + nominal_freq *= 1000; > + > + WRITE_ONCE(cpudata->nominal_freq, nominal_freq); > + WRITE_ONCE(cpudata->min_freq, min_freq); > + > + max_freq = perf_to_freq(cpudata, cpudata->highest_perf); > + lowest_nonlinear_freq = perf_to_freq(cpudata, cpudata->lowest_nonlinear_perf); > > - lowest_nonlinear_perf = READ_ONCE(cpudata->lowest_nonlinear_perf); > - lowest_nonlinear_freq = div_u64((u64)nominal_freq * lowest_nonlinear_perf, nominal_perf); > - WRITE_ONCE(cpudata->min_freq, min_freq * 1000); > - WRITE_ONCE(cpudata->lowest_nonlinear_freq, lowest_nonlinear_freq * 1000); > - WRITE_ONCE(cpudata->nominal_freq, nominal_freq * 1000); > - WRITE_ONCE(cpudata->max_freq, max_freq * 1000); > + WRITE_ONCE(cpudata->lowest_nonlinear_freq, lowest_nonlinear_freq); > + WRITE_ONCE(cpudata->max_freq, max_freq); > > /** > * Below values need to be initialized correctly, otherwise driver will fail to load