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Tue, 4 Oct 2022 20:01:49 GMT Received: from [10.110.73.50] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Tue, 4 Oct 2022 13:01:48 -0700 Message-ID: <07b09bc6-e415-0eac-056c-399ed8bac16f@quicinc.com> Date: Tue, 4 Oct 2022 15:01:47 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH 2/2] drivers: arm-smmu-impl: Add QDU1000 and QRU1000 iommu implementation Content-Language: en-US To: Krzysztof Kozlowski , Will Deacon , Joerg Roedel , Rob Herring , Krzysztof Kozlowski CC: Robin Murphy , , , , References: <20221001030615.29135-1-quic_molvera@quicinc.com> <20221001030615.29135-3-quic_molvera@quicinc.com> <4ea2b04a-c328-ec24-1231-33895607233e@linaro.org> From: Melody Olvera In-Reply-To: <4ea2b04a-c328-ec24-1231-33895607233e@linaro.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: N6CGG-gmfSvwb67r_OE_A5CY66FLyOIm X-Proofpoint-ORIG-GUID: N6CGG-gmfSvwb67r_OE_A5CY66FLyOIm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-04_09,2022-09-29_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 adultscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 phishscore=0 impostorscore=0 suspectscore=0 bulkscore=0 mlxlogscore=999 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210040130 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/1/2022 4:31 AM, Krzysztof Kozlowski wrote: > On 01/10/2022 05:06, Melody Olvera wrote: >> Add compatible for Qualcomm QDU1000 and QRU1000 SoCs to add iommu >> support for them. >> >> Signed-off-by: Melody Olvera >> --- >> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >> index b2708de25ea3..2b9a3c917aae 100644 >> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >> @@ -439,6 +439,8 @@ static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = { >> { .compatible = "qcom,sm8250-smmu-500" }, >> { .compatible = "qcom,sm8350-smmu-500" }, >> { .compatible = "qcom,sm8450-smmu-500" }, >> + { .compatible = "qcom,qdu1000-smmu-500" }, >> + { .compatible = "qcom,qru1000-smmu-500" }, > Again wrong order... Will fix. > > Best regards, > Krzysztof Thanks, Melody