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Wed, 11 Mar 2026 05:49:31 -0700 (PDT) X-Received: by 2002:a05:620a:404f:b0:8c7:f61:fd7b with SMTP id af79cd13be357-8cda1abfd4dmr263189285a.57.1773233370970; Wed, 11 Mar 2026 05:49:30 -0700 (PDT) Received: from [192.168.68.114] ([5.133.47.210]) by smtp.googlemail.com with ESMTPSA id a640c23a62f3a-b972de4795asm54054466b.18.2026.03.11.05.49.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 11 Mar 2026 05:49:29 -0700 (PDT) Message-ID: <07f8f42b-3b38-4288-9a81-83aec3f3cddd@oss.qualcomm.com> Date: Wed, 11 Mar 2026 12:49:28 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/7] arm64: dts: qcom: Add Monaco Monza SoM To: Konrad Dybcio , andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: richardcochran@gmail.com, geert+renesas@glider.be, arnd@arndb.de, dmitry.baryshkov@oss.qualcomm.com, ebiggers@kernel.org, michal.simek@amd.com, luca.weiss@fairphone.com, sven@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com, kuninori.morimoto.gx@renesas.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, m.facchin@arduino.cc, r.mereu@arduino.cc, loic.poulain@oss.qualcomm.com References: <20260309152420.1404349-1-srinivas.kandagatla@oss.qualcomm.com> <20260309152420.1404349-3-srinivas.kandagatla@oss.qualcomm.com> <63de1d04-adf0-4608-aeee-2d5208c100ae@oss.qualcomm.com> Content-Language: en-US From: Srinivas Kandagatla In-Reply-To: <63de1d04-adf0-4608-aeee-2d5208c100ae@oss.qualcomm.com> Content-Type: text/plain; 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It is designed to be mounted on >> carrier boards, enabling the development of complete embedded systems. >> >> The following components are described: >> - Fixed S2S 1.8V rail >> - PMM8654AU RPMh regulators (PMIC A and PMIC C) >> - Display subsystem/phy supplies (DSI, DP) >> - Enable GPU, GPI DMA, IRIS >> - PCIe Gen4 for both controllers and PHY supply hookups >> - QUPv3 firmware declarations >> - REFGEN always-on workaround for USB2 HS PHY >> - Remoteproc firmware names for ADSP, CDSP and GPDSP >> - Ethernet SERDES supplies >> - USB HS/SS PHY regulators >> - On-SoM eMMC >> >> Signed-off-by: Loic Poulain >> Co-developed-by: Srinivas Kandagatla >> Signed-off-by: Srinivas Kandagatla >> --- > > [...] > >> +/* PCIe0 Gen4 x2 */ >> +&pcie0 { >> + iommu-map = <0x0 &pcie_smmu 0x0000 0x1>, >> + <0x100 &pcie_smmu 0x0001 0x1>, >> + <0x200 &pcie_smmu 0x0007 0x1>, >> + <0x208 &pcie_smmu 0x0002 0x1>, >> + <0x210 &pcie_smmu 0x0003 0x1>, >> + <0x218 &pcie_smmu 0x0004 0x1>, >> + <0x300 &pcie_smmu 0x0005 0x1>, >> + <0x400 &pcie_smmu 0x0006 0x1>; >> + num-lanes = <2>; > > This is already set in monaco.dtsi All the comments look fine with me, will fix that in next version. --srini