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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b79f4975c88sm130358366b.35.2025.12.04.05.44.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 04 Dec 2025 05:44:15 -0800 (PST) Message-ID: <08284b5f-a6b4-42f7-95f5-28161ddcd356@oss.qualcomm.com> Date: Thu, 4 Dec 2025 14:44:13 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] arm64: dts: qcom: x1e80100: Add crypto engine To: Harshal Dev , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Val Packett , Stephan Gerhold , Abel Vesa , Udit Tiwari , Neeraj Soni References: <20251127-crypto_dt_node_x1e80100-v3-1-29722003fe83@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20251127-crypto_dt_node_x1e80100-v3-1-29722003fe83@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=RKW+3oi+ c=1 sm=1 tr=0 ts=69319032 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=hGZLfD6879LPmVnhkrMA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: rfFqqpB-_BBT27QAqkmjZqp3xt90mV6Y X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjA0MDExMSBTYWx0ZWRfX/I+SaMPMwYry 2sr5dxdDhL0j/HM0hWkKqB3sOPYfahkEtbV9PD3Gg5iENUaPoAdhdm/UcmEo7v6Go9b+fagJD55 wkyBIQB4gdcCPdXbqjk50PzHuX/5T/r/UG75xwhb1Bunhi9t5KqPx+SLF8j8zxS8kkeh4xYgjp9 r+CRzTmMVsX7JqOCbXzxQfCM9dnorIdlyv3D6hQ/7JdbjaSMQtUuV21TM0Fx6nWs6gHBpvF42pr 3NK0G2A+26gYgXAs/WJ/GKITIgElCnGp4HwDY15px0cTgcEn5q/j1JaH+5TohTda+d2x5L4Gb7h pxQbBOoOBcn8KUVWcNit5ksRBwy3EvOVs92gAWcikq080ZhtAk8QmiY5ArF30ri2PSUyCAoEfZk KHaAUR2P+VIJ6PgH86ZVi0y68s6Jmg== X-Proofpoint-ORIG-GUID: rfFqqpB-_BBT27QAqkmjZqp3xt90mV6Y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-04_03,2025-12-04_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 priorityscore=1501 adultscore=0 suspectscore=0 malwarescore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512040111 On 11/27/25 10:43 AM, Harshal Dev wrote: > On X Elite, there is a crypto engine IP block similar to ones found on > SM8x50 platforms. > > Describe the crypto engine and its BAM. > > Signed-off-by: Harshal Dev > --- > The dt-binding schema update for the x1e80100 compatible is here > (already merged): > > https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/ > --- > Changes in v3: > - Fixed num-channels and qcom,num-ees properties by updating them to 20 and 4 respectively. > - Link to v2: https://lore.kernel.org/all/20250221-x1e80100-crypto-v2-1-413ecf68dcd7@linaro.org > Changes in v2: > - Added EE and channels numbers in BAM node, like Stephan suggested. > - Added v1.7.4 compatible as well. > - Link to v1: https://lore.kernel.org/r/20250213-x1e80100-crypto-v1-1-f93afdd4025a@linaro.org > --- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > index 51576d9c935d..a1cadcce98e1 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > @@ -3033,6 +3033,30 @@ usb_1_ss2_qmpphy_dp_in: endpoint { > }; > }; > > + cryptobam: dma-controller@1dc4000 { > + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; > + reg = <0x0 0x01dc4000 0x0 0x28000>; > + interrupts = ; > + #dma-cells = <1>; > + iommus = <&apps_smmu 0x480 0x0000>, > + <&apps_smmu 0x481 0x0000>; Just 0x0 is good > + qcom,ee = <0>; > + qcom,controlled-remotely; > + num-channels = <20>; > + qcom,num-ees = <4>; > + }; > + > + crypto: crypto@1dfa000 { > + compatible = "qcom,x1e80100-qce", "qcom,sm8150-qce", "qcom,qce"; > + reg = <0x0 0x01dfa000 0x0 0x6000>; > + dmas = <&cryptobam 4>, <&cryptobam 5>; > + dma-names = "rx", "tx"; one a line, please > + iommus = <&apps_smmu 0x480 0x0000>, > + <&apps_smmu 0x481 0x0000>; > + interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>; 0 -> QCOM_ICC_TAG_ALWAYS Konrad