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Wed, 10 Sep 2025 12:02:36 +0000 (GMT) From: "Raghav Sharma" To: "'Krzysztof Kozlowski'" , , , , , , , , , Cc: , , , , , , , In-Reply-To: Subject: RE: [PATCH v1 3/3] arm64: dts: exynosautov920: add CMU_M2M clock DT nodes Date: Wed, 10 Sep 2025 17:32:25 +0530 Message-ID: <08fe01dc224a$cde7ff50$69b7fdf0$@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQL0VUKk+u5fQqVv+k+NmjKuZqPkUAF92JyxAaWVb6EA7wl7+7I7Vh2g Content-Language: en-us X-CMS-MailID: 20250910120239epcas5p108aec1b642bf599978295ab7fd7e8721 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" CMS-TYPE: 105P cpgsPolicy: CPGSC10-543,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250808141247epcas5p2c254f35146a6ea35b5c49c4316ba30a3 References: <20250808142146.3181062-1-raghav.s@samsung.com> <20250808142146.3181062-4-raghav.s@samsung.com> Hi Krzysztof > -----Original Message----- > From: Krzysztof Kozlowski > Sent: Monday, August 11, 2025 12:19 PM > To: Raghav Sharma ; s.nawrocki=40samsung.com; > cw00.choi=40samsung.com; mturquette=40baylibre.com; sboyd=40kernel.org; > robh=40kernel.org; conor+dt=40kernel.org; sunyeal.hong=40samsung.com; > shin.son=40samsung.com; alim.akhtar=40samsung.com > Cc: linux-samsung-soc=40vger.kernel.org; linux-clk=40vger.kernel.org; > devicetree=40vger.kernel.org; linux-arm-kernel=40lists.infradead.org; lin= ux- > kernel=40vger.kernel.org; dev.tailor=40samsung.com; chandan.vn=40samsung.= com; > karthik.sun=40samsung.com > Subject: Re: =5BPATCH v1 3/3=5D arm64: dts: exynosautov920: add CMU_M2M c= lock > DT nodes >=20 > On 08/08/2025 16:21, Raghav Sharma wrote: > > Add required dt node for CMU_M2M block, which provides clocks for M2M > > IP > > > > Signed-off-by: Raghav Sharma > > --- > > arch/arm64/boot/dts/exynos/exynosautov920.dtsi =7C 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > index 0fdf2062930a..086d6bbc18b8 100644 > > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > =40=40 -1454,6 +1454,19 =40=40 pinctrl_aud: pinctrl=401a460000 =7B > > reg =3D <0x1a460000 0x10000>; > > =7D; > > > > + cmu_m2m: clock-controller=400x1a800000 =7B >=20 >=20 > Are you sure this satisfies tests required by Samsung SoC maintainer prof= ile? >=20 Sorry for delay in reply, I was off for some time.=20 I understood the requirement here and thanks for your guidance on the other= thread.=20 I shall post the new version post fixing the compilation warnings. > Best regards, > Krzysztof