From: Robin Murphy <robin.murphy@arm.com>
To: Manish Narani <manish.narani@xilinx.com>,
gregkh@linuxfoundation.org, robh+dt@kernel.org,
michal.simek@xilinx.com, balbi@kernel.org,
p.zabel@pengutronix.de
Cc: devicetree@vger.kernel.org, linux-usb@vger.kernel.org,
linux-kernel@vger.kernel.org, git@xilinx.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/2] usb: dwc3: Add driver for Xilinx platforms
Date: Thu, 27 Aug 2020 19:46:37 +0100 [thread overview]
Message-ID: <0927fb9f-1044-38b3-d6f3-76edffefd99c@arm.com> (raw)
In-Reply-To: <1598467441-124203-3-git-send-email-manish.narani@xilinx.com>
On 2020-08-26 19:44, Manish Narani wrote:
[...]
> + /*
> + * This routes the usb dma traffic to go through CCI path instead
> + * of reaching DDR directly. This traffic routing is needed to
> + * make SMMU and CCI work with USB dma.
> + */
> + if (of_dma_is_coherent(dev->of_node) || dev->iommu_group) {
> + reg = readl(priv_data->regs + XLNX_USB_COHERENCY);
> + reg |= XLNX_USB_COHERENCY_ENABLE;
> + writel(reg, priv_data->regs + XLNX_USB_COHERENCY);
> + }
This looks rather suspect - coherency should be based on coherency, not
on whether an IOMMU group is present. If the device isn't described as
coherent in the DT, then any SMMU mappings will end up using attributes
that will downgrade traffic to be non-snooping anyway. And if the SMMU
is enabled but not translating (e.g. "iommu.passthrough=1") then
enabling hardware coherency when the DMA layer hasn't been told about it
can potentially lead to nasty subtle problems and data loss.
Robin.
next prev parent reply other threads:[~2020-08-27 18:46 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-26 18:43 [PATCH 0/2] Add a separate DWC3 OF " Manish Narani
2020-08-26 18:44 ` [PATCH 1/2] dt-bindings: usb: dwc3-xilinx: Add documentation for Versal DWC3 Controller Manish Narani
2020-09-08 23:05 ` Rob Herring
2020-09-09 15:46 ` Manish Narani
2020-09-09 16:00 ` Rob Herring
2020-08-26 18:44 ` [PATCH 2/2] usb: dwc3: Add driver for Xilinx platforms Manish Narani
2020-08-26 19:00 ` Randy Dunlap
2020-08-27 6:31 ` Felipe Balbi
2020-08-28 11:41 ` Manish Narani
2020-09-01 12:15 ` Felipe Balbi
2020-09-09 9:14 ` Manish Narani
2020-09-09 10:26 ` Felipe Balbi
2020-08-27 7:42 ` Chunfeng Yun
2020-08-27 9:02 ` Philipp Zabel
2020-08-27 18:46 ` Robin Murphy [this message]
2020-08-28 17:53 ` Manish Narani
2020-09-01 12:00 ` Robin Murphy
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