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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: Russell King , Frank Wunderlich , Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org References: <20230617062649.28444-1-arinc.unal@arinc9.com> <20230617062649.28444-2-arinc.unal@arinc9.com> From: Florian Fainelli In-Reply-To: <20230617062649.28444-2-arinc.unal@arinc9.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/17/2023 7:26 AM, arinc9.unal@gmail.com wrote: > From: Arınç ÜNAL > > MT7531_CPU_PMAP represents the destination port mask for trapped-to-CPU > frames (further restricted by PCR_MATRIX). > > Currently the driver sets the first CPU port as the single port in this bit > mask, which works fine regardless of whether the device tree defines port > 5, 6 or 5+6 as CPU ports. This is because the logic coincides with DSA's > logic of picking the first CPU port as the CPU port that all user ports are > affine to, by default. > > An upcoming change would like to influence DSA's selection of the default > CPU port to no longer be the first one, and in that case, this logic needs > adaptation. > > Since there is no observed leakage or duplication of frames if all CPU > ports are defined in this bit mask, simply include them all. > > Suggested-by: Russell King (Oracle) > Suggested-by: Vladimir Oltean > Signed-off-by: Arınç ÜNAL > Reviewed-by: Vladimir Oltean > Reviewed-by: Russell King (Oracle) Reviewed-by: Florian Fainelli -- Florian