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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b765503a990sm194688166b.63.2025.11.20.04.33.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 Nov 2025 04:33:31 -0800 (PST) Message-ID: <09b933ab-eba4-47c2-a667-370dbeda2749@oss.qualcomm.com> Date: Thu, 20 Nov 2025 13:33:29 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V2] iommu/arm-smmu: add actlr settings for mdss on sa8775p platform To: Charan Teja Kalla , Dmitry Baryshkov Cc: robin.clark@oss.qualcomm.com, will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, iommu@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20251118171822.3539062-1-charan.kalla@oss.qualcomm.com> <50bd3be1-63dd-4bf5-915a-02d923fb0376@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <50bd3be1-63dd-4bf5-915a-02d923fb0376@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=Jtf8bc4C c=1 sm=1 tr=0 ts=691f0a9d cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=Cn4BvpCIsXtoq-7YWPcA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-ORIG-GUID: 8gkyGRO6mz2qFD55bQXyTg5yEbpkrRna X-Proofpoint-GUID: 8gkyGRO6mz2qFD55bQXyTg5yEbpkrRna X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTIwMDA3OSBTYWx0ZWRfXzZW/rVlAiybl 9aooF6FIRp5tcfARGVtH1W6VA1iOxB2YPWeLxB7gL2EA34C5WBDL4hC/qMxYmvUitnmVdsw8/9p sMTvbBM8V3metNkzE11KpgOImbvORJT0QNWhaxDoS3BiBnlpD0anP4EVw9I/KOGhj8+AB+ZqYkE 7nxRbOXE+a4oFnBf6Si2OhJsgx8NeX4kYtoPaf+8/5bO5NTvi4uvbBl1woTJJwfKcvUaH8oQ68O j/rkbaIdLfjc80RDYv43AYIGmaPqr4FUMRIeK1I1uW5usienMl3LYRAtRQDSfXrmwHcMOxjdOzX sIUJpObZPmc0J9tjlnwBxF2eH0Nl1+U7sAs1PhuKn2tRDogIVi7mATWSPjSHRPA9Q9J+gdNxzsU wGg1TdE7TdZkz8ZwWtCNw3IN4xVzkw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-20_04,2025-11-20_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 phishscore=0 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511200079 On 11/19/25 7:06 PM, Charan Teja Kalla wrote: > > > On 11/18/2025 11:33 PM, Dmitry Baryshkov wrote: >>> Add ACTLR settings for the mdss device on Qualcomm SA8775P platform. >>> This is achieved by adding compatibility string for mdss in the actlr >>> client of match table. >>> >>> Signed-off-by: Charan Teja Kalla >>> --- >>> >>> Changed from V1: >>> 1) Added actlr setting only for MDSS and dropped for fastrpc. -- konrad >>> 2) ACTLR table is updated per alphanumeric order -- konrad >>> https://lore.kernel.org/all/20251105075307.1658329-1- >>> charan.kalla@oss.qualcomm.com/ >>> >>> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >>> index 62874b18f645..0b400e22cb00 100644 >>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >>> @@ -41,6 +41,8 @@ static const struct of_device_id qcom_smmu_actlr_client_of_match[] = { >>> .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) }, >>> { .compatible = "qcom,fastrpc", >>> .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) }, >>> + { .compatible = "qcom,sa8775p-mdss", >>> + .data = (const void *) (PREFETCH_DEFAULT | CMTLB) }, >> What's the difference from SC7280? Why don't we need to set CPRE? > > Sorry, I'm really not sure If your question imply to talk about the IP > level difference compared to SC7280 for mdss? "SC7280 has MDSS, SA8775P also has (a slightly different) MDSS, is there a reason these two have different settings" > Regarding why don't we need CPRE -- these are QoS settings that does > control how well hw behaves i.e., related to performance settings not > the functional ones. I guess, these settings are derived from factors > like how many masters are sharing a TBU, how crucial are masters using > that TBU(like important ones may be allowed to +7 or +15 and may be > others upto only +1 prefetch). And this is a good answer Perhaps you could reword it a little and put in the commit message to make it clear in case anyone has the same question in a year or so Konrad