From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
	id S1753454AbcARGth (ORCPT <rfc822;w@1wt.eu>);
	Mon, 18 Jan 2016 01:49:37 -0500
Received: from mail-oi0-f68.google.com ([209.85.218.68]:36323 "EHLO
	mail-oi0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
	with ESMTP id S1750857AbcARGtf (ORCPT
	<rfc822;linux-kernel@vger.kernel.org>);
	Mon, 18 Jan 2016 01:49:35 -0500
User-Agent: K-9 Mail for Android
In-Reply-To: <1453030101-14794-1-git-send-email-noltari@gmail.com>
References: <1453030101-14794-1-git-send-email-noltari@gmail.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Content-Type: text/plain;
 charset=UTF-8
Subject: Re: [PATCH 1/2] bmips: add BCM6358 support
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Sun, 17 Jan 2016 22:49:25 -0800
To: =?ISO-8859-1?Q?=C1lvaro_Fern=E1ndez_Rojas?= <noltari@gmail.com>,
        linux-mips@linux-mips.org, ralf@linux-mips.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        jogo@openwrt.org, cernekee@gmail.com
Message-ID: <0BC6030C-7485-4193-B86D-E690BF673952@gmail.com>
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On January 17, 2016 3:28:20 AM PST, "Álvaro Fernández Rojas" <noltari@gmail.com> wrote:
>BCM6358 has a shared TLB which conflicts with current SMP support, so
>it must
>be disabled for now.
>BCM6358 uses >= 0xfff00000 addresses for internal registers, which need
>to be
>remapped (by using a simplified version of BRCM63xx ioremap.h).
>
>Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
>---
> arch/mips/bmips/setup.c                    | 10 +++++++++
>arch/mips/include/asm/mach-bmips/ioremap.h | 33
>++++++++++++++++++++++++++++++
> 2 files changed, 43 insertions(+)
> create mode 100644 arch/mips/include/asm/mach-bmips/ioremap.h
>
>diff --git a/arch/mips/bmips/setup.c b/arch/mips/bmips/setup.c
>index 3553528..38b5bd5 100644
>--- a/arch/mips/bmips/setup.c
>+++ b/arch/mips/bmips/setup.c
>@@ -95,6 +95,15 @@ static void bcm6328_quirks(void)
> 		bcm63xx_fixup_cpu1();
> }
> 
>+static void bcm6358_quirks(void)
>+{
>+	/*
>+	 * BCM6358 needs special handling for its shared TLB, so
>+	 * disable SMP for now
>+	 */
>+	bmips_smp_enabled = 0;
>+}

That part looks good.

>+
> static void bcm6368_quirks(void)
> {
> 	bcm63xx_fixup_cpu1();
>@@ -104,6 +113,7 @@ static const struct bmips_quirk bmips_quirk_list[]
>= {
> 	{ "brcm,bcm3384-viper",		&bcm3384_viper_quirks		},
> 	{ "brcm,bcm33843-viper",	&bcm3384_viper_quirks		},
> 	{ "brcm,bcm6328",		&bcm6328_quirks			},
>+	{ "brcm,bcm6358",		&bcm6358_quirks			},
> 	{ "brcm,bcm6368",		&bcm6368_quirks			},
> 	{ "brcm,bcm63168",		&bcm6368_quirks			},
> 	{ },

<snip>

>+
>+static inline int is_bmips_internal_registers(phys_addr_t offset)
>+{
>+	if (offset >= 0xfff00000)
>+		return 1;
>+
>+	return 0;

That should probably be refined to be looking at the SoC/CPU you are running on, using eventually of_machine_is_compatible on the SoC-specific compatible string. For instance, on 6368 and newer, the physical register offset moves to PA 0x1000_0000.

Thanks!

-- 
Florian