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From: Jessica Clarke <jrtc27@jrtc27.com>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: Andreas Schwab <schwab@suse.de>, Alexandre Ghiti <alex@ghiti.fr>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv/atomic: Do proper sign extension also for unsigned in arch_cmpxchg
Date: Mon, 3 Feb 2025 21:22:54 +0000	[thread overview]
Message-ID: <0DF64D04-D609-4790-8279-7DFE24D1FB2C@jrtc27.com> (raw)
In-Reply-To: <alpine.DEB.2.21.2502030510390.41663@angie.orcam.me.uk>

On 3 Feb 2025, at 13:57, Maciej W. Rozycki <macro@orcam.me.uk> wrote:
> 
> On Thu, 30 Jan 2025, Jessica Clarke wrote:
> 
>>>> a2 is used as it is passed by the calling function, so we can't be sure a2
>>>> is sign extended to me, what am I missing?
>>> 
>>> 32-bit scalar arguments are guaranteed to be sign extended on entry.
>> 
>> Firstly, the calling convention is irrelevant if the function is
>> inlined, which this almost always will be.
> 
> Umm, that would be a compiler bug then, as inlining is supposed not to 
> change language semantics.  IOW the compiler is expected to explicitly 
> sign-extend the arguments of an inlined function at their evaluation point 
> just as it would at an actual function call unless the compiler is able to 
> prove they have come out sign-extended already from previous operations.

No it’s not. The calling convention is there so that each side of the
call know how the data is being passed between them. When inlining
occurs there is no such call and compilers can do whatever they like.
Calling conventions say absolutely nothing about what the
representation of a value is whilst inside a function, only at
boundaries. The ABI can also tell you what the observable
representation of values within a function should be (e.g. that int is
a 32-bit two’s complement value), but just like other platforms there
is nothing in the RISC-V ABI specifications to say that 32-bit integers
are kept sign-extended in registers, and that’s not going to be added
because LLVM has never implemented that for RISC-V so it would be an
ABI break for all LLVM-compiled RV64 code in existence.

Jess


  reply	other threads:[~2025-02-03 21:23 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-30  9:25 Andreas Schwab
2025-01-30 14:18 ` Alexandre Ghiti
2025-01-30 14:52   ` Andreas Schwab
2025-01-30 15:23     ` Alexandre Ghiti
2025-01-30 15:53       ` Andreas Schwab
2025-01-30 17:21         ` Jessica Clarke
2025-02-03  8:42           ` Andreas Schwab
2025-02-03 13:57           ` Maciej W. Rozycki
2025-02-03 21:22             ` Jessica Clarke [this message]
2025-02-04 16:44               ` Maciej W. Rozycki
2025-01-30 14:40 ` Andrew Jones
2025-01-30 21:35 ` David Laight
2025-02-03  8:42   ` Andreas Schwab
2025-02-01 12:17 ` Xi Ruoyao
2025-02-04  8:33 ` Alexandre Ghiti
2025-02-13 18:30 ` patchwork-bot+linux-riscv

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