From: Qiang Ma <maqianga@uniontech.com>
To: Huacai Chen <chenhuacai@kernel.org>
Cc: kernel@xen0n.name, loongarch@lists.linux.dev,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] LoongArch: Correct the calculation logic of thread_count
Date: Wed, 26 Nov 2025 16:37:55 +0800 [thread overview]
Message-ID: <0FD06C8FDE07BF59+07c19146-e999-4f09-83dd-4ef1ed7d4b1b@uniontech.com> (raw)
In-Reply-To: <CAAhV-H4EOTwn3fSJHWOkahgO3VHPGN9k9mbY7akpHDny_sBOsQ@mail.gmail.com>
在 2025/11/26 12:49, Huacai Chen 写道:
> Hi, Qiang,
>
> On Wed, Nov 26, 2025 at 10:37 AM Qiang Ma <maqianga@uniontech.com> wrote:
>> For thread_count, the current calculation method has a maximum of 255,
>> which may not be sufficient in the future. Therefore, we are correcting
>> it now.
> I think you should contact the Loongson BIOS team to confirm they will do so.
I contacted Li Chao from the Loongson BIOS team and had a brief
communication.
bios will do this when it exceeds 256.
>
> And we can hardly meet the case that one socket contains more than 256
> cores (this is different from the case MAX_CPUS > 256)
According to Li Chao, the 256 logic core on a single chip should arrive
in the next generation.
> Huacai
>
>> Reference: SMBIOS Specification, 7.5 Processor Information (Type 4)[1]
>>
>> [1]: https://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.9.0.pdf
>>
>> Signed-off-by: Qiang Ma <maqianga@uniontech.com>
>> ---
>> arch/loongarch/kernel/setup.c | 9 ++++++++-
>> 1 file changed, 8 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/loongarch/kernel/setup.c b/arch/loongarch/kernel/setup.c
>> index 25a87378e48e..760f5ce44384 100644
>> --- a/arch/loongarch/kernel/setup.c
>> +++ b/arch/loongarch/kernel/setup.c
>> @@ -56,6 +56,7 @@
>> #define SMBIOS_FREQLOW_MASK 0xFF
>> #define SMBIOS_CORE_PACKAGE_OFFSET 0x23
>> #define SMBIOS_THREAD_PACKAGE_OFFSET 0x25
>> +#define SMBIOS_THREAD_PACKAGE_2_OFFSET 0x2E
>> #define LOONGSON_EFI_ENABLE (1 << 3)
>>
>> unsigned long fw_arg0, fw_arg1, fw_arg2;
>> @@ -120,13 +121,19 @@ static void __init parse_cpu_table(const struct dmi_header *dm)
>> {
>> long freq_temp = 0;
>> char *dmi_data = (char *)dm;
>> + u8 thread_count;
>> + u16 thread_count2;
>>
>> freq_temp = ((*(dmi_data + SMBIOS_FREQHIGH_OFFSET) << 8) +
>> ((*(dmi_data + SMBIOS_FREQLOW_OFFSET)) & SMBIOS_FREQLOW_MASK));
>> cpu_clock_freq = freq_temp * 1000000;
>>
>> loongson_sysconf.cpuname = (void *)dmi_string_parse(dm, dmi_data[16]);
>> - loongson_sysconf.cores_per_package = *(dmi_data + SMBIOS_THREAD_PACKAGE_OFFSET);
>> + thread_count = *(dmi_data + SMBIOS_THREAD_PACKAGE_OFFSET);
>> + thread_count2 = *(u16 *)(dmi_data + SMBIOS_THREAD_PACKAGE_2_OFFSET);
>> + if (thread_count != 0)
>> + loongson_sysconf.cores_per_package = dm->length >= 0x30 && thread_count == 0xFF ?
>> + thread_count2 : thread_count;
>>
>> pr_info("CpuClock = %llu\n", cpu_clock_freq);
>> }
>> --
>> 2.20.1
>>
next prev parent reply other threads:[~2025-11-26 8:38 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-26 2:36 Qiang Ma
2025-11-26 4:49 ` Huacai Chen
2025-11-26 8:37 ` Qiang Ma [this message]
2025-11-26 5:27 ` Hengqi Chen
2025-11-26 9:47 ` Qiang Ma
2025-11-26 10:06 ` Hengqi Chen
2025-11-26 10:14 ` Qiang Ma
[not found] ` <d28a0011-5b9a-4e3e-a517-0c6d8933adae@uniontech.com>
2025-11-26 11:06 ` Qiang Ma
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