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Wed, 29 Oct 2025 03:01:00 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHvHLDqBXrIHqT5BhdcfrUajorIAMA9uhhTRhKCPx2T/Ja47LZZ5K0xA7gJ350vkbHObhXNJA== X-Received: by 2002:a05:6a21:3386:b0:342:e2ef:3323 with SMTP id adf61e73a8af0-346553f732emr2780316637.42.1761732060183; Wed, 29 Oct 2025 03:01:00 -0700 (PDT) Received: from [10.217.217.147] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b71268bd810sm13323143a12.6.2025.10.29.03.00.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Oct 2025 03:00:59 -0700 (PDT) Message-ID: <0a47016c-1d7e-4026-92bb-a13ac2ce169b@oss.qualcomm.com> Date: Wed, 29 Oct 2025 15:30:54 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 03/24] arm64: dts: qcom: Introduce Glymur base dtsi and CRD dts To: Konrad Dybcio , Pankaj Patil , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250925-v3_glymur_introduction-v1-0-24b601bbecc0@oss.qualcomm.com> <20250925-v3_glymur_introduction-v1-3-24b601bbecc0@oss.qualcomm.com> <2960a6fc-106b-4280-b4d4-9c1a3a449454@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: <2960a6fc-106b-4280-b4d4-9c1a3a449454@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: qp2ObN3rmvXll8_SNlUd4JqLMXJozyJV X-Proofpoint-ORIG-GUID: qp2ObN3rmvXll8_SNlUd4JqLMXJozyJV X-Authority-Analysis: v=2.4 cv=PcvyRyhd c=1 sm=1 tr=0 ts=6901e5de cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=HDE9XZ7bw9bohbkjgD8A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDI5MDA3NCBTYWx0ZWRfX710gH9wN6C0Z GidtFzyGmG7NaRh7WAi1+LZzmTM/+UxE+uDDDt7zM8/HawKmCCVgX4Me8q1AN+3Iq75QDFcum2g ZbOH2uc42gqBHsFwaUlXLjJNxzfaN9m18pz7WhyYq/HEcD7A5ZB7kJkU++yBl54m40ma+5Pr2OV nmsTzWP0viNKik54qCjE0IAhSnrzUF0YyjCY11UJvf8IsHeT/uE9+xiksWcq586ht3jyTCN+h9H nshvwKfWhSO3/+ATl8wxSWGrekQuGlyFJOKa+FwrY/Q3KzaWP7WhABQGH0fTEcz2RfixWk3yBye nUkINGO5OF3oJ2tHS4lL44Nz7IeWA1U0ZOEP/zcIRK8YKvVMV9aEQbyrwMItFmTeBuIkNkKbEUj tbLplZGFr6YxZDgEKfok3hd2nTOINA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-29_04,2025-10-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 spamscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 malwarescore=0 suspectscore=0 impostorscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2510290074 On 9/25/2025 3:46 PM, Konrad Dybcio wrote: >> + tcsrcc: clock-controller@1fd5044 { >> + compatible = "qcom,glymur-tcsr"; >> + reg = <0x0 0x1fd5044 0x0 0x48>; > We can map 0x1fd5000 - 0x1fd5094 inclusive, as that seems like a > logical subblock (this would require adjusting the driver) > Konrad, we encountered issues when trying to map regions beyond just the clock reference registers. Normally, we map the entire address range of a clock controller (CC) module in the device tree. However, for TCSRCC where CLKREF_EN registers are located within shared modules like TCSR or TLMM—we don't own the whole address space, and mapping the full range can overlap with other devices. To avoid this, we propose defining the base address as the first register actually used, and the size to only include up to the last register we use. This ensures we only map the relevant subblock, preventing conflicts with other device nodes. So want to keep the mapping same from the start of clockref clocks. > There's also a laaaarge pool of various TCSR_ registers between > the previous node and this one.. but we can leave that in case we > need to describe it in a specific way some day >> + #clock-cells = <1>; >> + #reset-cells = <1>; >> + }; >> + -- Thanks, Taniya Das