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Fri, 13 Nov 2026 04:18:31 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-ThreadId: AmcrnnMArev7 Date: Fri, 13 Nov 2026 10:18:10 +0100 From: "Arnd Bergmann" To: "Siddharth Chintamaneni" , "Fuad Tabba" Cc: "Marc Zyngier" , "Oliver Upton" , "Catalin Marinas" , "Will Deacon" , "Mark Rutland" , "Suzuki K Poulose" , "Joey Gouly" , "Zenghui Yu" , "Steffen Eiden" , "Yicong Yang" , "Zhou Wang" , "Navneet Singh" , apais@microsoft.com, rlmenge@gmail.com, hargar@linux.microsoft.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Message-Id: <0a5e252e-1494-4b0f-a761-d984238c9d0d@app.fastmail.com> In-Reply-To: <20261112180741.17614-1-sidchintamaneni@gmail.com> References: <20261023070110.1833446-1-fuad.tabba@linux.dev> <20261023070110.1833446-2-fuad.tabba@linux.dev> <86fqxwzul7.wl-maz@kernel.org> <86ecdgzp6m.wl-maz@kernel.org> <040cf379-baba-4e3a-bf3d-6bc009a9e28d@app.fastmail.com> <20261112180741.17614-1-sidchintamaneni@gmail.com> Subject: Re: [PATCH 1/2] KVM: arm64: Hide FEAT_LS64_ACCDATA from guests Content-Type: text/plain Content-Transfer-Encoding: 7bit On Thu, Nov 12, 2026, at 19:07, Siddharth Chintamaneni wrote: > On Tue, Oct 27, 2026 at 02:48:29PM +0100, Arnd Bergmann wrote: >> On Sat, Oct 24, 2026, at 09:14, Fuad Tabba wrote: >> > On a host that runs at EL1 (nVHE or hVHE), this also requires >> > __init_el2_fgt to set nACCDATA_EL1 in HFGRTR_EL2 and HFGWTR_EL2, and >> > __init_el2_hcrx to set HCRX_EL2.EnAS0. Without them, the ACCDATA_EL1 >> > access traps to EL2 and the hypervisor panics, and so does ST64BV0 >> > once SCTLR_EL1.EnAS0 is set. Happy to write those and the KVM change >> > once you're ready to post this. >> >> Thanks for the offer, that part is definitely not my area. > > We are preparing to post the Microsoft Smart Data Accelerator (SDA) VF > dmaengine driver for Microsoft Cobalt SoCs, which uses IOMMU SVA with > direct EL0 ST64BV0 portal submissions carrying the process PASID in > ACCDATA_EL1. > > Now that Fuad's KVM guest FEAT_LS64_ACCDATA series is queued, are you > planning to post the host ST64BV0 SVA + EL2/KVM patches as a standalone > series soon? Yes, sorry for the delay on my side, I'll try to get it to you ASAP. For my understanding of your requirements: - Is that hardware using an SMMUv3 or a different type of IOMMU? - Do you have userspace calling ST64BV0 on the host, guest or possibly both? > Either way, we have Cobalt hardware with FEAT_LS64_ACCDATA available and > would be happy to test your patches on silicon, or help put together and > carry any remaining pieces alongside our driver series if you prefer. Sounds good, thanks! Arnd