From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: niravkumar.l.rabara@intel.com, Dinh Nguyen <dinguyen@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: intel: socfpga_agilex: use defined GIC interrupt type for ECC
Date: Mon, 30 May 2022 08:36:05 +0200 [thread overview]
Message-ID: <0a5f8b4e-87d1-cd77-3e7b-38e56d6a7e12@linaro.org> (raw)
In-Reply-To: <20220530061212.1682439-1-niravkumar.l.rabara@intel.com>
On 30/05/2022 08:12, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> Use defined GIC interrupt type instead of hard-coded numbers for ECC
What is an ECC in the context of commit log? Please also add full-stop.
The code looks good, so with some explanation of ECC:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-05-30 6:36 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-30 6:12 niravkumar.l.rabara
2022-05-30 6:36 ` Krzysztof Kozlowski [this message]
2022-05-30 7:25 ` [PATCH v2] " niravkumar.l.rabara
2022-05-30 7:31 ` Krzysztof Kozlowski
2022-06-14 15:53 ` Dinh Nguyen
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