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> }; > > + lpac: lpac@3d00000 { > + compatible = "qcom,lpac"; > + reg = <0x0 0x03d00000 0x0 0x61000>; > + > + iommus = <&adreno_smmu 1 0x0>; > + }; I think this could work better as a subnode of the GPU (or perhaps if there's no "actual" separate address space, maybe just iommu-maps? for something also making use of the latter, see patches 1-5 of: https://lore.kernel.org/all/20260610-glymur-v8-0-1c79b9d51fc0@oss.qualcomm.com/ Konrad