Re: [PATCH v4 2/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's

[Renjiang Han <quic_renjiang@quicinc.com>]

On 3/19/2025 6:11 AM, Bryan O'Donoghue wrote:
> On 18/02/2025 10:33, Renjiang Han wrote:
>> From: Taniya Das <quic_tdas@quicinc.com>
>>
>> The video driver will be using the newly introduced
>> dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW
>> control modes at runtime.
>> Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for
>> Qualcomm SoC SC7180, SDM845, SM7150, SM8150 and SM8450.
>>
>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
>> ---
>>   drivers/clk/qcom/videocc-sc7180.c | 2 +-
>>   drivers/clk/qcom/videocc-sdm845.c | 4 ++--
>>   drivers/clk/qcom/videocc-sm7150.c | 4 ++--
>>   drivers/clk/qcom/videocc-sm8150.c | 4 ++--
>>   drivers/clk/qcom/videocc-sm8450.c | 4 ++--
>>   5 files changed, 9 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/videocc-sc7180.c 
>> b/drivers/clk/qcom/videocc-sc7180.c
>> index 
>> d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 
>> 100644
>> --- a/drivers/clk/qcom/videocc-sc7180.c
>> +++ b/drivers/clk/qcom/videocc-sc7180.c
>> @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = {
>>       .pd = {
>>           .name = "vcodec0_gdsc",
>>       },
>> -    .flags = HW_CTRL,
>> +    .flags = HW_CTRL_TRIGGER,
>>       .pwrsts = PWRSTS_OFF_ON,
>>   };
>>   diff --git a/drivers/clk/qcom/videocc-sdm845.c 
>> b/drivers/clk/qcom/videocc-sdm845.c
>> index 
>> f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 
>> 100644
>> --- a/drivers/clk/qcom/videocc-sdm845.c
>> +++ b/drivers/clk/qcom/videocc-sdm845.c
>> @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = {
>>       },
>>       .cxcs = (unsigned int []){ 0x890, 0x930 },
>>       .cxc_count = 2,
>> -    .flags = HW_CTRL | POLL_CFG_GDSCR,
>> +    .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>>       .pwrsts = PWRSTS_OFF_ON,
>>   };
>>   @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = {
>>       },
>>       .cxcs = (unsigned int []){ 0x8d0, 0x950 },
>>       .cxc_count = 2,
>> -    .flags = HW_CTRL | POLL_CFG_GDSCR,
>> +    .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>>       .pwrsts = PWRSTS_OFF_ON,
>>   };
>>   diff --git a/drivers/clk/qcom/videocc-sm7150.c 
>> b/drivers/clk/qcom/videocc-sm7150.c
>> index 
>> 14ef7f5617537363673662adc3910ddba8ea6a4f..b6912560ef9b7a84e7fd1d9924f5aac6967da780 
>> 100644
>> --- a/drivers/clk/qcom/videocc-sm7150.c
>> +++ b/drivers/clk/qcom/videocc-sm7150.c
>> @@ -271,7 +271,7 @@ static struct gdsc vcodec0_gdsc = {
>>       },
>>       .cxcs = (unsigned int []){ 0x890, 0x9ec },
>>       .cxc_count = 2,
>> -    .flags = HW_CTRL | POLL_CFG_GDSCR,
>> +    .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>>       .pwrsts = PWRSTS_OFF_ON,
>>   };
>>   @@ -282,7 +282,7 @@ static struct gdsc vcodec1_gdsc = {
>>       },
>>       .cxcs = (unsigned int []){ 0x8d0, 0xa0c },
>>       .cxc_count = 2,
>> -    .flags = HW_CTRL | POLL_CFG_GDSCR,
>> +    .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>>       .pwrsts = PWRSTS_OFF_ON,
>>   };
>>   diff --git a/drivers/clk/qcom/videocc-sm8150.c 
>> b/drivers/clk/qcom/videocc-sm8150.c
>> index 
>> daab3237eec19b727d34512d3a2ba1d7bd2743d6..3024f6fc89c8b374f2ef13debc283998cb136f6b 
>> 100644
>> --- a/drivers/clk/qcom/videocc-sm8150.c
>> +++ b/drivers/clk/qcom/videocc-sm8150.c
>> @@ -179,7 +179,7 @@ static struct gdsc vcodec0_gdsc = {
>>       .pd = {
>>           .name = "vcodec0_gdsc",
>>       },
>> -    .flags = HW_CTRL,
>> +    .flags = HW_CTRL_TRIGGER,
>>       .pwrsts = PWRSTS_OFF_ON,
>>   };
>>   @@ -188,7 +188,7 @@ static struct gdsc vcodec1_gdsc = {
>>       .pd = {
>>           .name = "vcodec1_gdsc",
>>       },
>> -    .flags = HW_CTRL,
>> +    .flags = HW_CTRL_TRIGGER,
>>       .pwrsts = PWRSTS_OFF_ON,
>>   };
>>   static struct clk_regmap *video_cc_sm8150_clocks[] = {
>> diff --git a/drivers/clk/qcom/videocc-sm8450.c 
>> b/drivers/clk/qcom/videocc-sm8450.c
>> index 
>> f26c7eccb62e7eb8dbd022e2f01fa496eb570b3f..4cefcbbc020f201f19c75c20229415e0bdea2963 
>> 100644
>> --- a/drivers/clk/qcom/videocc-sm8450.c
>> +++ b/drivers/clk/qcom/videocc-sm8450.c
>> @@ -347,7 +347,7 @@ static struct gdsc video_cc_mvs0_gdsc = {
>>       },
>>       .pwrsts = PWRSTS_OFF_ON,
>>       .parent = &video_cc_mvs0c_gdsc.pd,
>> -    .flags = RETAIN_FF_ENABLE | HW_CTRL,
>> +    .flags = HW_CTRL_TRIGGER | RETAIN_FF_ENABLE,
>>   };
>>     static struct gdsc video_cc_mvs1c_gdsc = {
>> @@ -372,7 +372,7 @@ static struct gdsc video_cc_mvs1_gdsc = {
>>       },
>>       .pwrsts = PWRSTS_OFF_ON,
>>       .parent = &video_cc_mvs1c_gdsc.pd,
>> -    .flags = RETAIN_FF_ENABLE | HW_CTRL,
>> +    .flags = HW_CTRL_TRIGGER | RETAIN_FF_ENABLE,
>>   };
>>     static struct clk_regmap *video_cc_sm8450_clocks[] = {
>>
>
> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

Hi @Bjorn

Could you help pick this into videocc?

-- 
Best Regards,
Renjiang