From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Harshal Dev <harshal.dev@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Abel Vesa <abelvesa@kernel.org>,
Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>,
Neeraj Soni <neeraj.soni@oss.qualcomm.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>,
Sumit Garg <sumit.garg@oss.qualcomm.com>,
Selvam Sathappan Periakaruppan
<selvam.periakaruppan@oss.qualcomm.com>
Cc: Basant Kumar <basantk@qti.qualcomm.com>,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-crypto@vger.kernel.org
Subject: Re: [PATCH 3/5] firmware: qcom: Add an TEE bus based ICE back-end
Date: Thu, 22 Oct 2026 09:51:51 +0200 [thread overview]
Message-ID: <0b389532-a917-49fc-a827-3b90d3ffd95b@oss.qualcomm.com> (raw)
In-Reply-To: <20261021-ice-migrate-tee-svc-v1-3-b035be7aab0a@oss.qualcomm.com>
On 10/21/26 5:43 PM, Harshal Dev wrote:
> Add support for a TEE client driver which forwards calls from the Inline
> Crypto Engine (ICE) service (invoked by the ICE driver) to the OPTEE ICE
> Psuedo-TA.
>
> The ICE PTA supports both ICE Legacy and Standard modes. In Standard mode
> Hardware Key Manager v1 is supported.
>
> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
> ---
[...]
> + ret = tee_client_invoke_func(data->ctx, &inv_arg, param);
> + if (ret < 0 || inv_arg.ret != 0) {
> + dev_err(dev,
> + "ICE generate_key failed, ret=%d, err=0x%x\n",
> + ret, inv_arg.ret);
> + ret = ret ?: -EINVAL;
> + goto out;
> + }
> +
> + buf = tee_shm_get_va(key_shm, 0);
This can return an ERR_PTR()
> + out_size = param[0].u.memref.size;
This returned size is not validated, there are a couple occurences
of that
> +
> + memcpy(lt_key, buf, lt_key_size);
> + memzero_explicit(buf, out_size);
> +out:
> + tee_shm_free(key_shm);
LLM is concerned about freeing the key without zeroing the memory
first
> +static int qcom_ice_tee_probe(struct tee_client_device *ice_dev)
> +{
> + struct device *dev = &ice_dev->dev;
> + struct qcom_ice_tee_private *data;
> + struct tee_ioctl_open_session_arg sess_arg = {
> + .clnt_login = TEE_IOCTL_LOGIN_REE_KERNEL,
> + };
> + int ret, err = -ENODEV;
> +
> + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
> + if (!data)
> + return -ENOMEM;
> +
> + data->ctx = tee_client_open_context(NULL, optee_ctx_match, NULL, NULL);
> + if (IS_ERR(data->ctx))
> + return -ENODEV;
> +
> + export_uuid(sess_arg.uuid, &ice_dev->id.uuid);
> + ret = tee_client_open_session(data->ctx, &sess_arg, NULL);
> + if (ret < 0 || sess_arg.ret != 0) {
> + dev_err(dev,
> + "tee_client_open_session failed, ret=%d, err=0x%x\n",
> + ret, sess_arg.ret);
> + err = ret ?: -EINVAL;
> + goto out_ctx;
Should we care about the specific retval that comes from the TEE?
> + }
> +
> + data->session_id = sess_arg.session;
> + dev_set_drvdata(dev, data);
> +
> + qcom_ice_ops_tee.dev = dev;
> + qcom_ice_svc_ops_register(&qcom_ice_ops_tee);
This can fail (but it currently returns void)
Konrad
next prev parent reply other threads:[~2026-10-22 7:51 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 15:43 [PATCH 0/5] Add support for a TEE agnostic Inline Crypto Engine service Harshal Dev
2026-10-21 15:43 ` [PATCH 1/5] firmware: qcom: Add a generic ICE service Harshal Dev
2026-10-22 7:45 ` Konrad Dybcio
2026-10-21 15:43 ` [PATCH 2/5] firmware: qcom_scm: Transition to the " Harshal Dev
2026-10-21 15:43 ` [PATCH 3/5] firmware: qcom: Add an TEE bus based ICE back-end Harshal Dev
2026-10-22 7:47 ` Konrad Dybcio
2026-10-22 7:51 ` Konrad Dybcio [this message]
2026-10-22 7:52 ` Konrad Dybcio
2026-10-21 15:43 ` [PATCH 4/5] soc: qcom: ice: Migrate to the generic ICE service Harshal Dev
2026-10-21 15:43 ` [PATCH 5/5] firmware: qcom: scm: Drop exported ICE wrapper functions Harshal Dev
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