Re: [PATCH v5 01/16] x86/cpufeatures: Support Privilege Level Zero Association (PLZA)

[Reinette Chatre <reinette.chatre@intel.com>]

Hi Babu,

On 8/26/26 12:32 PM, Babu Moger wrote:
> When memory bandwidth associated with a CLOSID is aggressively throttled,
> and a task with that CLOSID moves into kernel mode, the kernel operations
> are also aggressively throttled. This can stall forward progress and
> eventually degrade overall system performance.
> 
> AMD hardware supports a feature Privilege Level Zero Association (PLZA),
> which allows the CPU's CLOSID association to be changed during the

CLOSID -> CLOSID and/or RMID?

> transition from user mode to kernel mode. This allows the kernel to run
> using a different CLOSID than user space, which can improve system

CLOSID -> CLOSID and/or RMID?

> performance.

"... and/or separately monitor the work done in kernel mode."?

> 
> PLZA also applies to cache allocation and monitoring features and provides
> flexibility to manage allocation and monitoring associations independently.

This reads like an afterthought. Are users expected to use cache allocation
while PLZA is enabled? Since only one resource group can be assigned I expect
there to be quite a few sharp corners when both are in use. Kernel work done
on behalf of high as well as low priority work will use the same cache allocations
and thus neither could actually get full benefit from having dedicated cache
portions?

> The feature is detected via CPUID_Fn80000020_EBX_x00 [Bit 9]: Privilege
> Level Zero Association (PLZA).
> 
> The PLZA feature details are documented in [1] available from [2].
> 
> [1] AMD64 Zen6 Platform Quality of Service (PQOS) Extensions:
>     Publication # 69193 Revision: 1.00, Issue Date: March 2026
> 
> Signed-off-by: Babu Moger <babu.moger@amd.com>
> Acked-by: Borislav Petkov (AMD) <bp@alien8.de>
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 # [2]
> ---

Reinette