From: Dmitry Osipenko <digetx@gmail.com>
To: Ashish Mhetre <amhetre@nvidia.com>,
thierry.reding@gmail.com, jonathanh@nvidia.com,
linux-tegra@vger.kernel.org, krzysztof.kozlowski@canonical.com,
linux-kernel@vger.kernel.org
Cc: Snikam@nvidia.com, vdumpa@nvidia.com
Subject: Re: [Patch V1 3/4] memory: tegra: add mc-err support for T186
Date: Wed, 12 Jan 2022 14:22:31 +0300 [thread overview]
Message-ID: <0b584dfd-04f6-d7f7-f08a-003b89e557f5@gmail.com> (raw)
In-Reply-To: <1641926750-27544-4-git-send-email-amhetre@nvidia.com>
11.01.2022 21:45, Ashish Mhetre пишет:
> #define MC_INT_DECERR_ROUTE_SANITY BIT(20)
> #define MC_INT_WCAM_ERR BIT(19)
> #define MC_INT_SCRUB_ECC_WR_ACK BIT(18)
I don't see where these errors are handled in the code. Is documentation
that explains these bits publicly available?
next prev parent reply other threads:[~2022-01-12 11:22 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-11 18:45 [Patch V1 0/4] memory: tegra: Update mc interrupts Ashish Mhetre
2022-01-11 18:45 ` [Patch V1 1/4] memory: tegra: Add support for " Ashish Mhetre
2022-01-11 20:29 ` Krzysztof Kozlowski
2022-01-19 7:36 ` Ashish Mhetre
2022-01-12 8:13 ` Dmitry Osipenko
2022-01-19 8:47 ` Ashish Mhetre
2022-01-19 13:42 ` Dmitry Osipenko
2022-01-11 18:45 ` [Patch V1 2/4] memory: tegra: Add interrupt mask Ashish Mhetre
2022-01-11 20:32 ` Krzysztof Kozlowski
2022-01-19 7:38 ` Ashish Mhetre
2022-01-11 18:45 ` [Patch V1 3/4] memory: tegra: add mc-err support for T186 Ashish Mhetre
2022-01-11 20:56 ` Krzysztof Kozlowski
2022-01-19 8:33 ` Ashish Mhetre
2022-01-12 11:01 ` Dmitry Osipenko
2022-01-19 8:53 ` Ashish Mhetre
2022-01-19 13:41 ` Dmitry Osipenko
2022-01-12 11:02 ` Dmitry Osipenko
2022-01-19 8:58 ` Ashish Mhetre
2022-01-12 11:22 ` Dmitry Osipenko [this message]
2022-01-12 11:24 ` Dmitry Osipenko
2022-01-19 9:09 ` Ashish Mhetre
2022-01-19 13:42 ` Dmitry Osipenko
2022-01-11 18:45 ` [Patch V1 4/4] memory: tegra: add mc-err support for T194 Ashish Mhetre
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