From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Oliver Upton <oliver.upton@linux.dev>, Marc Zyngier <maz@kernel.org>
Cc: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>,
joey.gouly@arm.com, yuzenghui@huawei.com,
catalin.marinas@arm.com, will@kernel.org,
alexandru.elisei@arm.com, linux-arm-kernel@lists.infradead.org,
kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] KVM: arm64: Check cpu_has_spe() before initializing PMSCR_EL1 in VHE
Date: Thu, 9 Oct 2025 10:11:20 +0100 [thread overview]
Message-ID: <0b610239-6e90-464a-bf01-5332de62719f@arm.com> (raw)
In-Reply-To: <aOasxgCMG0yS4t43@linux.dev>
On 08/10/2025 19:26, Oliver Upton wrote:
> On Wed, Oct 08, 2025 at 11:46:55AM +0100, Marc Zyngier wrote:
>> On Tue, 07 Oct 2025 19:31:45 +0100,
>> Oliver Upton <oliver.upton@linux.dev> wrote:
>>>
>>> Hi Mukesh,
>>>
>>> I find it a bit odd to refer to cpu_has_spe() in the shortlog, which
>>> doesn't exist prior to this patch.
>>>
>>> On Tue, Oct 07, 2025 at 11:53:56PM +0530, Mukesh Ojha wrote:
>>>> commit efad60e46057 ("KVM: arm64: Initialize PMSCR_EL1 when in VHE")
>>>> initializes PMSCR_EL1 to 0 which is making the boot up stuck when KVM
>>>> runs in VHE mode and reverting the change is fixing the issue.
>>>>
>>>> [ 2.967447] RPC: Registered tcp NFSv4.1 backchannel transport module.
>>>> [ 2.974061] PCI: CLS 0 bytes, default 64
>>>> [ 2.978171] Unpacking initramfs...
>>>> [ 2.982889] kvm [1]: nv: 568 coarse grained trap handlers
>>>> [ 2.988573] kvm [1]: IPA Size Limit: 40 bits
>>>>
>>>> Lets guard the change with cpu_has_spe() check so that it only affects
>>>> the cpu which has SPE feature supported.
>>>
>>> This could benefit from being spelled out a bit more. In both cases we
>>> check for the presence of FEAT_SPE, however I believe the issue you
>>> observe is EL3 hasn't delegated ownership of the Profiling Buffer to
>>> Non-secure nor does it reinject an UNDEF in response to the sysreg trap.
>>>
>>> I agree that the change is correct but the rationale needs to be clear.
>>
>> To me, this smells a lot more like some sort of papering over a
>> firmware bug. Why isn't SPE available the first place?
>
> While I agree this points the finger at a half-assed EL3, the
> architecture explicitly allows this sort of crap and we cope with the
> accessibility of SPE in almost every other case.
One of the reasons behind this control is to work around errata, where
the higher EL could prevent the OS from using a broken implementation.
Also, for KVM could use the EL2 controls to disable SPE for Guest.
Suzuki
>
> We should at least be consistent in how we handle an inaccessible SPE.
>
> Thanks,
> Oliver
next prev parent reply other threads:[~2025-10-09 9:11 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-07 18:23 Mukesh Ojha
2025-10-07 18:31 ` Oliver Upton
2025-10-08 10:46 ` Marc Zyngier
2025-10-08 12:40 ` Leo Yan
2025-10-08 16:50 ` Mukesh Ojha
2025-10-08 18:17 ` Leo Yan
2025-10-08 18:26 ` Oliver Upton
2025-10-09 9:11 ` Suzuki K Poulose [this message]
2025-10-08 11:53 ` Mukesh Ojha
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