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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by SJ1PEPF000026C3.mail.protection.outlook.com (10.167.244.100) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9564.3 via Frontend Transport; Fri, 23 Jan 2026 04:51:54 +0000 Received: from satlexmb07.amd.com (10.181.42.216) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Thu, 22 Jan 2026 22:51:53 -0600 Received: from [10.136.37.139] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server id 15.2.2562.17 via Frontend Transport; Thu, 22 Jan 2026 20:51:50 -0800 Message-ID: <0b625352-f0e0-49c6-83a2-a69250c6caeb@amd.com> Date: Fri, 23 Jan 2026 10:21:49 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] sched/clock: Avoid false sharing for sched_clock_irqtime To: Vincent Guittot CC: Wangyang Guo , Peter Zijlstra , Ingo Molnar , Juri Lelli , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , , Shrikanth Hegde , Benjamin Lei , Tim Chen , Tianyou Li References: <20260116023945.1849329-1-wangyang.guo@intel.com> <95f2091c-273e-4e36-b543-735748efd5fc@amd.com> <648b2b54-7432-4578-b785-030d98f6e31c@amd.com> <653ac450-2f00-4eb0-bb97-e40576435462@amd.com> Content-Language: en-US From: K Prateek Nayak In-Reply-To: Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jan 2026 04:51:54.1430 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d3771d8b-391f-4bba-dc4a-08de5a3b2158 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000026C3.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7691 Hello Vincent, On 1/22/2026 4:06 PM, Vincent Guittot wrote: >>> or unstable clock need another workqueue for disabling sched_clock_irqtime >> >> Ack! We'll likely need a second workqueue and call it early in >> __clear_sched_clock_stable(). >> >> AFAICT, PA-RISC already suffers from this since it marks >> sched_clock_unstable() on SMP but since it uses the generic sched_clock, >> on a >= 1MHz processor, it enabled irqtime anyways and nothing disables >> it later (unlike TSC, the clocksource doesn't have a "mark_unstable" >> callback). > >> >> If we can delay enabling the irqtime accounting until we do >> __set_sched_clock_stable() for CONFIG_HAVE_UNSTABLE_SCHED_CLOCK (I have >> no clue if this is acceptable of not), then we can move the enabling / >> disabling of irqtime to the same spots as when we flip >> __sched_clock_stable. > > Do you mean to delay the enabling/disabling of irqtime accounting in > sched_clock_init_late for CONFIG_HAVE_UNSTABLE_SCHED_CLOCK case ? Yup! > > I don't have system with unstable clock so I'm not the best to answer > but if irqtime accounting is not compatible with unstable clock it > should be enabled at the same time as the clock is marked stable Here are logs from my system with stable TSC highlighting the flow: [ 0.000000] tsc: Fast TSC calibration using PIT [ 0.000000] tsc: Detected 1996.299 MHz processor # native_sched_clock() stats using TSC from jiffies # Once we hit sched_clock_init() we'll start using # local_clock_noinstr which uses tsc. [ 6.497022] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x398d0c7513b, max_idle_ns: 881590744042 ns [ 6.507546] Calibrating delay loop (skipped), value calculated using timer frequency.. 3992.59 BogoMIPS (lpj=7985196) # tsc-early is registered [ 10.455611] clocksource: Switched to clocksource tsc-early # Clocksource has switched to tsc-early [ 13.863291] tsc: Refined TSC clocksource calibration: 1996.250 MHz [ 13.869689] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x398caf77d7a, max_idle_ns: 881590459467 ns [ 13.880722] clocksource: Switched to clocksource tsc # Full tsc switch now that HPET is registered and the granularity # of TSC calibration can be found more precisely [ 15.382498] sched_clock: Marking stable (15304347096, 75265818)->(17063112601, -1683499687) # sched-clock is finally marked stable at sched_clock_init_late() # __sched_clock_offset is calculated and __sched_clock_stable is flipped If TSC / any potentially unstable clock is marked unstable before sched_clock_init_late(), we never flip __sched_clock_stable. On x86 side, since we already start using TSC for native_sched_clock() super early, we have defensive measures (and a __use_tsc static key on the x86 side too) to switch the sched clock back to jiffies if we realise TSC was unstable before we hit sched_clock_init_late(). This is necessary since post the sched_clock_init(), "sched_clock_running" is true and the local clocks will always uses sched_clock_noinstr() and it must be switch to jiffies on the x86 side since arch defines it. -- Thanks and Regards, Prateek