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Tue, 6 Feb 2024 11:48:06 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 6 Feb 2024 11:48:05 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 6 Feb 2024 11:48:05 -0600 Received: from [10.249.42.149] ([10.249.42.149]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 416Hm5g3049653; Tue, 6 Feb 2024 11:48:05 -0600 Message-ID: <0b758df7-8583-48d1-b289-a297890344f4@ti.com> Date: Tue, 6 Feb 2024 11:48:05 -0600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] arm64: dts: ti: k3-am62-wakeup: Add chip efuse nodes Content-Language: en-US To: Markus Schneider-Pargmann , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Santosh Shilimkar CC: , , References: <20240206143711.2410135-1-msp@baylibre.com> <20240206143711.2410135-5-msp@baylibre.com> From: Andrew Davis In-Reply-To: <20240206143711.2410135-5-msp@baylibre.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On 2/6/24 8:37 AM, Markus Schneider-Pargmann wrote: > Add efuse nodes describing chip variant and speed grade. > > Signed-off-by: Markus Schneider-Pargmann > --- > arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 36 +++++++++++++++++++++- > 1 file changed, 35 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi > index fef76f52a52e..14419df43624 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi > @@ -14,10 +14,44 @@ wkup_conf: syscon@43000000 { > #size-cells = <1>; > ranges = <0x0 0x00 0x43000000 0x20000>; > > + wkup_efuse: efuse@0 { > + compatible = "socionext,uniphier-efuse"; > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0x0 0x200>; > + > + nvmem-layout { > + compatible = "fixed-layout"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + chip_manufacturer: jtagidmfg@14 { > + reg = <0x14 0x2>; > + bits = <1 11>; > + }; > + > + chip_partno: jtagidpartno@15 { > + reg = <0x15 0x3>; > + bits = <4 16>; > + }; > + > + chip_variant: jtagidvariant@17 { > + reg = <0x17 0x1>; > + bits = <4 4>; > + }; > + > + chip_speed: jtaguseridspeed@18 { > + reg = <0x18 0x4>; > + bits = <6 5>; > + }; > + }; > + }; > + > chipid: chipid@14 { If you remove the reg property you will want to drop the @14 also or you will get a DT check warning. That needs fixed in the binding example too (and the binding nodename pattern). Andrew > bootph-all; > compatible = "ti,am654-chipid"; > - reg = <0x14 0x4>; > + nvmem-cells = <&chip_variant>, <&chip_partno>, <&chip_manufacturer>; > + nvmem-cell-names = "chipvariant", "chippartno", "chipmanufacturer"; > }; > }; >