From: Logan Bristol <logan.bristol@utexas.edu>
To: Josua Mayer <josua@solid-run.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Vignesh Raghavendra <vigneshr@ti.com>, Nishanth Menon <nm@ti.com>
Cc: Matt McKee <mmckee@phytec.com>, Wadim Egorov <w.egorov@phytec.de>,
"linux@ew.tq-group.com" <linux@ew.tq-group.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: dts: ti: k3-am64* Disable ethernet by default at SoC level
Date: Thu, 8 Aug 2024 10:05:34 -0500 [thread overview]
Message-ID: <0b8a35c0-66f1-44c9-8a4a-4af5072da59b@utexas.edu> (raw)
In-Reply-To: <16f9ab4a-62ce-4406-94d4-1441e459469b@solid-run.com>
On 8/8/2024 1:50 AM, Josua Mayer wrote:
> Am 08.08.24 um 00:13 schrieb Logan Bristol:
>> External interfaces should be disabled at the SoC DTSI level, since
>> the node is incomplete. The node should then be enabled in the board DTS.
>> Disable ethernet switch and ports in SoC DTSI and enable them in the board
>> DTS.
>>
>> Reflect this change in SoM DTSIs by removing ethernet port disable.
>>
>> Signed-off-by: Logan Bristol <logan.bristol@utexas.edu>
>> ---
>> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 3 +++
>> arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi | 4 ----
>> arch/arm64/boot/dts/ti/k3-am642-evm.dts | 3 +++
>> arch/arm64/boot/dts/ti/k3-am642-hummingboard-t.dts | 8 ++++++++
>> arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts | 8 ++++++++
>> arch/arm64/boot/dts/ti/k3-am642-sk.dts | 3 +++
>> arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 4 ----
>> arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts | 6 ++----
>> 8 files changed, 27 insertions(+), 12 deletions(-)
> cut
>> diff --git a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t.dts b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t.dts
>> index 5b5e9eeec5ac..90ffc426cae1 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t.dts
>> @@ -89,6 +89,14 @@ serdes_mux: mux-controller {
>> };
>> };
>>
>> +&cpsw3g {
>> + status = "okay";
>> +};
>> +
>> +&cpsw_port1 {
>> + status ="okay";
>> +};
>> +
> SolidRun AM642 SoM has ethernet phys on the SoM itself,
> carrier only provides physical connector.
>
> Therefore the ports status should be set in som dtsi,
> where we also set pinctrl and phy-handle.
>
>> &main_gpio0 {
>> m2-reset-hog {
>> gpio-hog;
> cut
>> diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
>> index c19d0b8bbf0f..995e2703030b 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
>> @@ -212,10 +212,6 @@ &cpsw_port1 {
>> phy-handle = <ðernet_phy0>;
>> };
>>
> Please enable cpsw3g and cpsw_port1 status here.
I will make this change.
Thank you,
Logan Bristol
prev parent reply other threads:[~2024-08-08 15:04 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-07 21:13 Logan Bristol
2024-08-08 6:50 ` Josua Mayer
2024-08-08 15:05 ` Logan Bristol [this message]
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